(EN) The invention relates to the technical field of memories, in particular to a self-reference storage structure and a storage and calculation integrated circuit, and the self-reference storage structurecomprises: three transistors including a first transistor, a second transistor and a third transistor; and two magnetic tunnel junctions that comprise a first magnetic tunnel junction and a second magnetic tunnel junction; the first magnetic tunnel junction is connected in series between the first transistor and the second transistor; the second magnetic tunnel junction is connected in series between the second transistor and the third transistor; when the first transistor, the second transistor and the third transistor are started, write-in of one-bit binary information is realized; when data storage is realized, one-bit binary writing can be realized only by applying one-way current, and the device is low in time delay, low in power consumption and high in data reading margin in the writing process.
(ZH) 本发明涉及存储器技术领域，尤其涉及一种自参考存储结构及存算一体电路，该自参考存储结构，包括：三个晶体管，包括：第一晶体管、第二晶体管、第三晶体管；两个磁隧道结，包括：第一磁隧道结、第二磁隧道结；所述第一磁隧道结串联于所述第一晶体管与所述第二晶体管之间；所述第二磁隧道结串联于所述第二晶体管与所述第三晶体管之间；在开启第一晶体管、第二晶体管、第三晶体管时，实现一位二进制信息的写入；在实现数据存储时，只需要施加单向电流即可实现一位二进制的写入，且器件在写入过程中延时低、功耗小，数据读取裕度高。
