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1. WO2020162972 - COMPOSANT D'IMPRESSION À CIRCUIT DE MÉMOIRE

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CLAIMS

1. A memory circuit for a print component comprising:

a plurality of I/O pads, including a first analog pad and a second analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component, including an analog signal path connected to the first analog pad and the second analog pad, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the print component;

a memory component to store memory values associated with the print component; and

a control circuit to, in response to a sequence of operating signals received by the I/O pads representing a memory read, provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.

2. The memory circuit of claim 1 , the print component having memory elements, each memory element having a bit value, each memory value of a portion of the memory values of the memory component corresponding to a different one of the memory elements, where the memory value may be different from the bit value of the corresponding memory element.

3. The memory circuit of claim 1 or 2, the memory component including a portion of memory values corresponding to non-memory read functions.

4. The memory circuit of claim 3, in response to a sequence of operating signals on the I/O pads representing non-memory read functions which access the analog signal path, the control circuit to provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing the stored memory values identified by the non-memory read functions.

5. The memory circuit of claim 4, the non-memory read function comprising a read of at least one analog component.

6. The memory circuit of claim 5, the at least one analog component comprising at least one sense circuit.

7. The memory circuit of claim 6, the at least one sense circuit comprising a thermal sense circuit.

8. The memory circuit of any of claims 1 -7, the analog pad comprising an analog sense pad.

9. The memory circuit of any of claims 1 -8, the analog pad connected to an analog sense circuit.

10. The memory circuit of any of claims 1 -9, the control circuit to adjust the analog signal to provide the analog electrical value to the analog pad to represent an expected analog electrical value corresponding to the selected memory values.

1 1. The memory circuit of claim 10, the analog electrical value being a voltage level when the memory read and non-memory read functions accessing the analog signal path comprise a forced current signal on the analog pad, the control circuit to adjust the current level of the analog signal to adjust the voltage level at the analog pad.

12. The memory circuit of claim 10 or 1 1 , the analog electrical value being a current level when the memory read and non-memory read functions accessing the analog signal path comprise a forced voltage signal on the analog pad, the control circuit to adjust the current level of the analog signal to adjust the current level at the analog pad.

13. The memory circuit of any of claims 1 -12, in response to a sequence of operating signals being communicated by the I/O pads representing a memory write, the control circuit to update the stored memory values corresponding to the memory write.

14. The memory circuit of any of claims 1 -13, the memory component and control circuit being on a same die.

15. The memory circuit of any of claims 1 -14, the memory component comprising an array of memory cells to store the memory values.

16. The memory circuit of any of claims 1 -15, the memory component comprising a look-up table of the memory values.

17. A print component comprising:

a fluidic ejection circuit receiving a plurality of operating signals on a plurality of signal paths, including an analog signal path, the fluidic ejection circuit including;

an array of fluid actuators; and

an array of memory elements; and

a memory circuit

a plurality of I/O pads to connect to the plurality of signal paths, including a first analog pad and a second analog pad connected to the analog signal path, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the print fluidic ejection circuit;

a memory component to store memory values associated with the print component; and

a control circuit to, in response to a sequence of operating signals received by the I/O pads representing a memory read of selected memory elements of the fluidic ejection circuit, provide an analog signal to the first analog pad to provide an analog electrical value at the analog pad representing stored memory values corresponding to the memory elements selected by the memory read.

18. The print component of claim 17, each memory element of the fluidic die having a bit value, each memory value of a portion of the memory values of the memory component corresponding to a different one of the memory elements, where the memory value may be different from the bit value of the

corresponding memory element.

19. The print component of claim 17 or 18, the memory component including a portion of memory values corresponding to non-memory read functions.

20. The print component of claim 19, in response to a sequence of operating signals on the I/O pads representing non-memory read functions which access the analog signal path, the control circuit to provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing the stored memory values identified by the non-memory read functions.

21. The print component of claim 20, the non-memory read function comprising a read of at least one analog component.

22. The print component of claim 21 , the at least one analog component comprising at least one sense circuit.

23. The print component of claim 22, the at least one sense circuit comprising a thermal sense circuit.

24. The print component of any of claims 17-23, the analog pad comprising an analog sense pad.

25. The print component of any of claims 17-24, the analog pad connected to an analog sense circuit.

26. The print component of any of claims 17-25, the control circuit to adjust the analog signal to provide the analog electrical value to the analog pad to represent an expected analog electrical value corresponding to the selected memory values.

27. The print component of claim 26, the analog electrical value being a voltage level when the memory read and non-memory read functions accessing the analog signal path comprise a forced current signal on the analog pad, the control circuit to adjust the current level of the analog signal to adjust the voltage level at the analog pad.

28. The print component of claim 26 or 27, the analog electrical value being a current level when the memory read and non-memory read functions accessing the analog signal path comprise a forced voltage signal on the analog pad, the control circuit to adjust the current level of the analog signal to adjust the current level at the analog pad.

29. The print component of any of claims 17-28, in response to a sequence of operating signals being communicated by the I/O pads representing a memory write, the control circuit to update the stored memory values

corresponding to the memory write.

30. The print component of any of claims 17-29, the memory component and control circuit being on a same die.

31. The print component of any of claims 17-30, the memory component comprising an array of memory cells to store the memory values.

32. The print component of any of claims 17-31 , the memory component comprising a look-up table of the memory values.

33. A print component comprising:

a plurality of fluidic ejection die receiving a plurality of operating signals on a plurality of signal paths, including a separate data signal path for each fluidic ejection die and an analog signal path shared by each fluidic ejection die, each fluidic ejection die including:

an array of fluid actuators; and

an array of memory elements, each memory element a data bit having a bit value; and

a memory die including:

a plurality of I/O pads to connect to the plurality of signal paths, including a first analog pad and a second analog pad connected to the analog signal path, the first analog pad electrically isolated from the second analog pad to interrupt the analog signal path to the fluidic ejection die;

a memory component to store memory values associated with print component; and

a memory component to store memory values, each memory value of a portion of the memory values corresponding to a different one of the memory elements of the plurality of fluidic ejection die, where the memory value may be different from the bit value of the corresponding memory element; and

a control circuit, in response to a sequence of operating signals representing a memory read of selected memory elements of the plurality of fluidic die, to provide an analog signal to the first analog pad to provide an analog electrical value at the first analog pad representing stored memory values corresponding to the memory elements selected by the memory read.

34. The print component of claim 33, each memory value of a portion of the memory values of the memory component corresponding to a different one of the memory elements of the plurality of fluidic die, where the memory value may be different from the bit value of the corresponding memory element.

35. The print component of claim 33 or 34, the memory component including a portion of memory values corresponding to non-memory read functions of the plurality of fluidic die.

36. The print component of claim 35, in response to a sequence of operating signals on the I/O pads representing non-memory read functions which access the analog signal path, the control circuit to provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing the stored memory values identified by the non-memory read functions.

37 The print component of claim 36, the non-memory read function comprising a read of at least one analog component.

38. The print component of claim 37, the at least one analog component comprising at least one sense circuit.

39. The print component of claim 38, the at least one sense circuit comprising a thermal sense circuit.

40. The print component of any of claims 33-39, in response to identifying a sequence of operating signals representing a memory write to selected memory elements of the plurality of fluidic die, the control circuit to update the memory values corresponding to the selected memory elements.

41. The print component of any of claims 33-40, the memory circuit to supplement the array of memory elements of a portion of the fluidic die.

42. The print component of any of claims 33-41 , the plurality of fluidic ejection die comprising three fluidic die arranged to form a color print pen.

43. The print component of any of claims 33-42, the plurality of fluidic ejection die comprising a fluidic die arranged to form a monochromatic print pen.

44. The print component of any of claims 33-43, the control circuit to adjust the analog signal driven to the analog pad such that the analog signal driven by the control circuit together with the analog signal from the fluid ejection circuit results in the analog electrical value on the analog pad representing the stored memory values corresponding to the memory elements selected by the memory read.

45. The print component of any of claims 33-44, the analog electrical characteristic including one of a voltage level and a current level.