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1. WO2020156860 - STRUCTURE DE GUIDE D'ONDE POUR INTÉGRATION DE QUIBIT-OPTIQUE-CMOS

Note: Texte fondé sur des processus automatiques de reconnaissance optique de caractères. Seule la version PDF a une valeur juridique

[ EN ]

CLAIMS

1. A waveguide structure, comprising:

a wafer; and

a waveguide disposed on the wafer, the waveguide comprising a silicon germanium (SiGe) core surrounded by silicon (Si), wherein the wafer has a lower refractive index than the Si.

2. The waveguide structure of claim 1 , wherein the wafer comprises a material selected from the group consisting of: sapphire, diamond, silicon carbide (SiC), gallium nitride (GaN), and combinations thereof.

3. The waveguide structure of either of the preceding claims, wherein the waveguide has a ring shape.

4. The waveguide structure of claim 3, wherein the waveguide comprises a resonator-based microwave-to-optical transducer.

5. The waveguide structure of claim 4, further comprising:

a top electrode disposed on the waveguide.

6. The waveguide structure of claim 5, wherein the top electrode has a crescent shape.

7. The waveguide structure of any of claims 4 to 6, further comprising:

a bottom electrode disposed on a side of the wafer opposite the waveguide.

8. The waveguide structure of any of claims 4 to 7, further comprising:

bias electrodes disposed on the wafer on opposite sides of the waveguide.

9. The waveguide structure of any of claims 4 to 8, further comprising:

at least one quantum bit (qubit) disposed on the wafer.

10. The waveguide structure of claim 9, wherein the at least one qubit comprises:

a superconducting bottom electrode on an Si layer; and

a superconducting top electrode separated from the superconducting bottom electrode by an insulator.

11. The waveguide structure of claim 10, wherein the Si layer is undercut beneath the superconducting bottom electrode such that the at least one qubit is suspended over the wafer.

12. The waveguide structure of any of claims 8 to 11 , further comprising:

at least one superconducting bus path between the waveguide and the at least one qubit.

13. The waveguide structure of claim 12, further comprising:

at least one field effect transistor (FET) disposed on the wafer connecting the at least one superconducting bus path between the waveguide and the at least one qubit.

14. A computing device, comprising:

a waveguide structure comprising a wafer, and a waveguide disposed on the wafer, the waveguide comprising a resonator-based microwave-to-optical transducer having a SiGe core surrounded by Si, wherein the wafer has a lower refractive index than the Si;

at least one qubit disposed on the wafer;

for each at least one qubit: a superconducting bus path between the waveguide and the qubit; and an FET disposed on the wafer connecting the superconducting bus path between the waveguide and the qubit.

15. The computing device of claim 14, wherein the wafer comprises a material selected from the group consisting of: sapphire, diamond, SiC, GaN, and combinations thereof.

16. The computing device of either of claims 14 or 15, wherein each of the qubits comprises:

a superconducting bottom electrode on an Si layer; and

a superconducting top electrode separated from the superconducting bottom electrode by an insulator.

17. The computing device of claim 16, wherein the Si layer is undercut beneath the superconducting bottom electrode such that the at least one qubit is suspended over the wafer.

18. A method for quantum computing, comprising the steps of:

providing a computing device of any of claims 14 to 17;

selecting one of the superconducting bus paths between the waveguide and a given one of the qubits; routing a microwave signal from the given one of the qubits along the one of the superconducting bus paths that has been selected; and

converting the microwave signal to an optical signal via the resonator-based microwave-to-optical transducer.

19. The method of claim 18, wherein the superconducting bus paths are connected to source and drains of the FETs, and wherein the step of selecting the one of the superconducting bus paths comprises the step of:

applying a gate voltage to a given one of the FETs along the one of the superconducting bus paths to switch the give one of the FETs from a high resistance state between the source and drains to a low resistance state between the source and drains.