Colecciones nacionales e internacionales de patentes

1. (WO1992012520) PROCESS FOR TESTING A STORE ARRANGED ON A SEMICONDUCTOR COMPONENT AS A MACROCELL ON THE SELF-TESTING PRINCIPLE AND CIRCUIT FOR IMPLEMENTING SAID PROCESS

Pub. No.:    WO/1992/012520    International Application No.:    PCT/DE1992/000005
Publication Date: 23-jul-1992 International Filing Date: 07-ene-1992
IPC: G11C 29/10
Applicants: SIEMENS AKTIENGESELLSCHAFT
RITTER, Hartmut
SCHWAIR, Thomas
MAY, Werner
MAIERHOFER, Johann
Inventors: RITTER, Hartmut
SCHWAIR, Thomas
MAY, Werner
MAIERHOFER, Johann
Title: PROCESS FOR TESTING A STORE ARRANGED ON A SEMICONDUCTOR COMPONENT AS A MACROCELL ON THE SELF-TESTING PRINCIPLE AND CIRCUIT FOR IMPLEMENTING SAID PROCESS
Abstract:
In the self-testing process, test samples are taken to the store, or rather its storage cells, and written into them, whereafter the storage cells are read out and defective storage cells are detected from the test results read out. The test algorithm for generating the test samples is produced in such a way that, in an initial stage (PH1), it stores logic values of one kind ('O' or '1') bitwise in the storage elements of the storage cells and then sets a pause. In a further stage (PH3), each storage cell is read out during a test cycle with a running address sequence and then a pseudo random test sample is written into the storage cell. The test cycle is repeated until a desired degree of fault recognition is reached. This store test algorithm makes it possible to provide a macrocell with a store and additional self-testing circuits which can easily be parametrised and automatically reset; it is of universal application and needs only a short test time.