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1. (US6134151) Space management for managing high capacity nonvolatile memory

Office : United States of America
Application Number: 09519226 Application Date: 06.03.2000
Publication Number: 6134151 Publication Date: 17.10.2000
Grant Number: 6134151 Grant Date: 17.10.2000
Publication Kind : A
IPC:
G06F 11/00
G11C 16/04
G11C 8/00
G06F 11/20
G11C 8/12
G06F 12/02
G11C 16/06
G06F 15/40
G11C 16/08
G06F 3/06
G11C 16/10
G11B 20/10
G11C 17/00
G11C 29/00
G11C 5/00
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
04
using variable threshold transistors, e.g. FAMOS
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
8
Arrangements for selecting an address in a digital store
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
16
Error detection or correction of the data by redundancy in hardware
20
using active fault-masking, e.g. by switching out faulty elements or by switching in spare elements
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
8
Arrangements for selecting an address in a digital store
12
Group selection circuits, e.g. for memory block selection, chip selection, array selection
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
15
Digital computers in general; Data processing equipment in general
20
Design or construction of the computing part, adapted to a specific application
40
for information retrieval; for compiling abstracts; Database structures therefor
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
08
Address circuits; Decoders; Word-line control circuits
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
10
Programming or data input circuits
G PHYSICS
11
INFORMATION STORAGE
B
INFORMATION STORAGE BASED ON RELATIVE MOVEMENT BETWEEN RECORD CARRIER AND TRANSDUCER
20
Signal processing not specific to the method of recording or reproducing; Circuits therefor
10
Digital recording or reproducing
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
17
Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
5
Details of stores covered by group G11C11/63
CPC:
G06F 12/0246
G11C 8/12
G11C 16/04
G11C 16/08
G11C 16/102
G11C 16/16
Applicants: Lexar Media, Inc.
Inventors: Estakhri Petro
Iman Berhanu
Guo Min
Agents: Law Office of Imam
Priority Data: 09283728 01.04.1999 US
Title: (EN) Space management for managing high capacity nonvolatile memory
Abstract: front page image
(EN)

In accordance with an embodiment of the present invention, a method and apparatus is disclosed for use in a digital system having a host coupled to at least two nonvolatile memory devices. The host stores digital information in the nonvolatile memory devices and reads the stored digital information from the nonvolatile memory devices. The memory devices are organized into blocks of sectors of information. The method is for erasing digital information stored in the blocks of the nonvolatile memory devices and comprises assigning a predetermined number of blocks, in sequential order, to each of the nonvolatile memory devices, each block having a predetermined number of sectors. The method further comprises forming `super` blocks, each `super` block comprising a plurality of blocks, identifying a particular `super` block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device for erasure of the particular `super` block and erasing the first and second selected blocks of the particular `super` block so that erasure of the second block is performed without waiting for completion of the erasure of the first block; and indicating the status of the first and second nonvolatile memory devices to be busy during erasure of the first and second selected blocks, wherein the speed of erase operations in the digital system is substantially increased thereby increasing the overall performance of the digital system.


Also published as:
US6141249