Search International and National Patent Collections
Some content of this application is unavailable at the moment.
If this situation persists, please contact us atFeedback&Contact
1. (US5924113) Direct logical block addressing flash memory mass storage architecture

Office : United States of America
Application Number: 09087720 Application Date: 29.05.1998
Publication Number: 5924113 Publication Date: 13.07.1999
Grant Number: 5924113 Grant Date: 13.07.1999
Publication Kind : A
IPC:
G06F 12/08
G06F 3/06
G06F 11/10
G06F 12/02
G11C 16/06
G11C 16/08
G11C 16/10
G11C 29/00
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
08
in hierarchically structured memory systems, e.g. virtual memory systems
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
08
Error detection or correction by redundancy in data representation, e.g. by using checking codes
10
Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
08
Address circuits; Decoders; Word-line control circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
10
Programming or data input circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
CPC:
G11C 29/765
G06F 3/0613
G06F 3/0616
G06F 3/064
G06F 3/0679
G06F 11/1068
G06F 12/023
G06F 12/0246
G11C 16/08
G11C 16/102
G11C 29/82
Applicants: Lexar Media, Inc.
Inventors: Estakhri Petro
Assar Mahmud
Agents: Imam Maryam
Priority Data: 08509706 31.07.1995 US
Title: (EN) Direct logical block addressing flash memory mass storage architecture
Abstract: front page image
(EN)

A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically the mass storage will need to be cleaned up. These advantages are achieved through the use of several flag, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address. Furthermore, the volatile memory device is configured to store physical block addresses in volatile memory locations identified by logical block addresses and is configured to store flags in volatile memory locations identified by the physical block addresses. During power-up the physical block addresses are used to address the volatile memory locations and update the flags with shadow flags of the nonvolatile memory.