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1. US20190108886 - Reading circuit and method for a non-volatile memory device

Office United States of America
Application Number 16145734
Application Date 28.09.2018
Publication Number 20190108886
Publication Date 11.04.2019
Grant Number 10593410
Grant Date 17.03.2020
Publication Kind B2
IPC
G11C 16/06
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
G11C 16/28
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
26Sensing or reading circuits; Data output circuits
28using differential sensing or reference cells, e.g. dummy cells
G11C 16/04
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
04using variable threshold transistors, e.g. FAMOS
G11C 16/24
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
24Bit-line control circuits
G11C 7/06
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
06Sense amplifiers; Associated circuits
G11C 7/08
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
06Sense amplifiers; Associated circuits
08Control thereof
CPC
G11C 7/065
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
06Sense amplifiers; Associated circuits, ; e.g. timing or triggering circuits
065Differential amplifiers of latching type
G11C 16/28
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
26Sensing or reading circuits; Data output circuits
28using differential sensing or reference cells, e.g. dummy cells
G11C 7/08
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
7Arrangements for writing information into, or reading information out from, a digital store
06Sense amplifiers; Associated circuits, ; e.g. timing or triggering circuits
08Control thereof
G11C 13/004
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
13Digital stores characterised by the use of storage elements not covered by groups G11C11/00, G11C23/00 - G11C25/00
0002using resistive RAM [RRAM] elements
0021Auxiliary circuits
004Reading or sensing circuits or methods
G11C 16/0408
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
04using variable threshold transistors, e.g. FAMOS
0408comprising cells containing floating gate transistors
G11C 16/24
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
16Erasable programmable read-only memories
02electrically programmable
06Auxiliary circuits, e.g. for writing into memory
24Bit-line control circuits
Applicants STMicroelectronics S.r.l.
Inventors Carmelo Paolino
Antonino Conte
Anna Rita Maria Lipani
Agents Slater Matsil, LLP
Title
(EN) Reading circuit and method for a non-volatile memory device
Abstract
(EN)

A sense-amplifier circuit can be used with a non-volatile memory device having a memory array with memory cells arranged in word lines and bit lines and coupled to respective source lines. The circuit has a first circuit branch and a second circuit branch, which receive on a respective first comparison input and second comparison input, during a reading step of a datum stored in a memory cell, a cell current from the bit line associated to the memory cell and a reference current, from a reference bit line in a differential reading operation or from a current-reference generator in a single-ended reading operation. The first and second circuit branches generate, during the datum-reading step, a first output voltage and a second output voltage, as a function of the difference between the cell current and the reference current.