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1. (EP1717707) Writing data identified by a logical block address into two different locations of a nonvolatile memory

Office : European Patent Office
Application Number: 06076505 Application Date: 31.03.1998
Publication Number: 1717707 Publication Date: 02.11.2006
Publication Kind : B1
Designated States: AL, DE, FR, GB, LT, LV, MK, RO, SI
IPC:
G06F 3/06
G06F 12/00
G06F 3/08
G06F 11/00
G06F 11/10
G06F 12/02
G06F 12/06
G06F 12/10
G06F 12/16
G11C 16/02
G11C 16/08
G11C 16/10
G11C 29/00
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
3
Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06
Digital input from, or digital output to, record carriers
08
from or to individual record carriers, e.g. punched card
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
11
Error detection; Error correction; Monitoring
07
Responding to the occurrence of a fault, e.g. fault tolerance
08
Error detection or correction by redundancy in data representation, e.g. by using checking codes
10
Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
06
Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
08
in hierarchically structured memory systems, e.g. virtual memory systems
10
Address translation
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
16
Protection against loss of memory contents
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
08
Address circuits; Decoders; Word-line control circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
10
Programming or data input circuits
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
29
Checking stores for correct operation; Testing stores during standby or offline operation
CPC:
G11C 29/765
G06F 3/061
G06F 3/0613
G06F 3/0619
G06F 3/064
G06F 3/0652
G06F 3/0679
G06F 11/1068
G06F 12/023
G06F 12/0246
G06F 2212/7201
G11C 16/08
G11C 16/102
G11C 29/82
Applicants: LEXAR MEDIA INC
Inventors: GANJUEI ALI R
ESTAKHRI PETRO
IMAN BERHANU
Priority Data: 98914371 31.03.1998 EP
83126697 31.03.1997 US
85884797 19.05.1997 US
Title: (DE) Schreiben von Daten durch eine logische Blockadresse identifiziert in zwei unterschiedlichen Stellen eines nicht-flüchtigen Speichers
(EN) Writing data identified by a logical block address into two different locations of a nonvolatile memory
(FR) Ecriture de données identifiées par une adresse logique de bloc en deux emplacements distincts d'une mémoire non-volatile
Abstract: front page image
(EN) A device (700) is disclosed for storing mapping information for mapping a logical block address identifying a block being accessed by a host to a physical block address, identifying a free area of nonvolatile memory, the block being selectively erasable and having one or more sectors that may be individually moved. The mapping information including a virtual physical block address (702) for identifying an "original" location within the nonvolatile memory where a block is stored and a moved virtual physical block address (704) for identifying a "moved" location within the nonvolatile memory where one or more sectors of the stored block are moved. The mapping information further including status information (706,712) for use of the "original" physical block address and the "moved" physical block address and for providing information (714) regarding "moved" sectors within the block being accessed.
Also published as:
KR1020010005824EP2278471EP0980551JP2002508862 AU1998068738WO/1998/044420