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1. (EP1228510) SPACE MANAGEMENT FOR MANAGING HIGH CAPACITY NONVOLATILE MEMORY

Office : European Patent Office
Application Number: 00920016 Application Date: 30.03.2000
Publication Number: 1228510 Publication Date: 07.08.2002
Publication Kind : B1
Prior PCT appl.: Application Number:US2000008686 ; Publication Number: Click to see the data
IPC:
G11C 16/04
G06F 12/02
G11C 8/12
G11C 16/16
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
04
using variable threshold transistors, e.g. FAMOS
G PHYSICS
06
COMPUTING; CALCULATING; COUNTING
F
ELECTRIC DIGITAL DATA PROCESSING
12
Accessing, addressing or allocating within memory systems or architectures
02
Addressing or allocation; Relocation
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
8
Arrangements for selecting an address in a digital store
12
Group selection circuits, e.g. for memory block selection, chip selection, array selection
G PHYSICS
11
INFORMATION STORAGE
C
STATIC STORES
16
Erasable programmable read-only memories
02
electrically programmable
06
Auxiliary circuits, e.g. for writing into memory
10
Programming or data input circuits
14
Circuits for erasing electrically, e.g. erase voltage switching circuits
16
for erasing blocks, e.g. arrays, words, groups
CPC:
G11C 8/12
G06F 12/0246
G06F 2212/7205
G06F 2212/7208
G11C 16/04
G11C 16/16
Applicants: LEXAR MEDIA INC
Inventors: ESTAKHRI PETRO
IMAN BERHANU
GUO MIN
Priority Data: 283728 null
519226 null
US19990283728 null
US2000008686 null
US20000519226 null
WO2000US08686 null
0008686 30.03.2000 US
28372899 01.04.1999 US
51922600 06.03.2000 US
Title: (DE) RAUMVERWALTUNG IN EINEM NICHTFLÜCHTIGEN SPEICHER MIT HOHER KAPAZITÄT
(EN) SPACE MANAGEMENT FOR MANAGING HIGH CAPACITY NONVOLATILE MEMORY
(FR) GESTION D'ESPACE POUR LA GESTION D'UNE MEMOIRE NON VOLATILE HAUTE CAPACITE
Abstract: front page image
(EN) A controller device (10) includes a space manager circuit (28) responsive to address information from a host (22) and operative to read, write and erase information in a nonvolatile memory unit (16) based on the host address information. The space manager circuit (28) assigns a predetermined number of blocks (202, 204, 206, 208), in sequential order to each of the nonvolatile memory device, forms super block, each super block having blocks arranged in parallel, identifies a particular super block having at least two blocks, a first block being located in a first nonvolatile memory device and a second block being located in a second nonvolatile memory device, for erasure of the particular super block.
(FR) La présente invention concerne un dispositif de contrôle (10) comportant un circuit de gestion d'espace (28) sensible à une donnée d'adresse provenant d'un hôte (22) et opérant en lecture, en écriture et en effacement de donnée dans une unité de mémoire non volatile (16) sur la base de la donnée d'adresse du hôte. Le circuit de gestion d'espace (28) attribue un nombre prédéterminé de blocs (202, 204, 206, 208), en ordre de séquence à chaque dispositif de mémoire non volatile, constitue un super bloc, chaque super bloc présentant des blocs disposés en parallèle, identifie un super bloc spécifique ayant au moins deux blocs, un premier bloc étant situé dans un premier dispositif de mémoire non volatile et un deuxième bloc étant situé dans un deuxième dispositif de mémoire non volatile, pour l'effacement de ce super bloc spécifique.
Also published as:
EP1729304EP1739683AU2000040617WO/2000/060605