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1. CN108061848 - FPGA-based addition carry chain delay measurement method and system

Office China
Application Number 201711277942.4
Application Date 06.12.2017
Publication Number 108061848
Publication Date 22.05.2018
Grant Number 108061848
Grant Date 10.12.2019
Publication Kind B
IPC
G01R 31/28
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
G01R 31/317
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
317Testing of digital circuits
CPC
G01R 31/2882
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
2851Testing of integrated circuits [IC]
2882Testing timing characteristics
G01R 31/31725
GPHYSICS
01MEASURING; TESTING
RMEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
31Arrangements for testing electric properties; Arrangements for locating electric faults; Arrangements for electrical testing characterised by what is being tested not provided for elsewhere
28Testing of electronic circuits, e.g. by signal tracer
317Testing of digital circuits
31725Timing aspects, e.g. clock distribution, skew, propagation delay
Applicants WUHAN WANJI INFORMATION TECHNOLOGY CO., LTD.
武汉万集信息技术有限公司
Inventors YANG MINGHUI
杨明惠
ZHOU XING
周行
YANG JUN
杨俊
Agents 北京路浩知识产权代理有限公司 11002
北京路浩知识产权代理有限公司 11002
Title
(EN) FPGA-based addition carry chain delay measurement method and system
(ZH) 基于FPGA的加法进位链延时的测量方法及系统
Abstract
(EN)
The invention provides an FPGA-based addition carry chain delay measurement method and system. The measurement method comprises steps: pulse test signals trigger the carry chain of a multi-bit adder,and according to the change condition of the current pulse test signals, the operation position value of the carry chain is acquired; with the clock cycle for generating the pulse test signals as an interval, the pulse test signals are translated sequentially, and after each time of pulse test signal translation, the operation position value can be triggered and acquired again until the operationposition values corresponding to all operation positions in the carry chain are acquired; and the relationship data between each operation position value of the carry chain and the corresponding position of each pulse test signal are acquired, and according to the relationship data, the delay time at each operation position of the carry chain is obtained. The delay time between different carry chains can be measured in real time, influences of temperature and voltage fluctuations can be avoided, and FPGA-based TDC module high-precision timing can be realized.

(ZH)
本发明提供了一种基于FPGA的加法进位链延时的测量方法及系统,该测量方法包括:脉冲测试信号触发多位加法器的进位链,且根据当前的脉冲测试信号的变化情况采集进位链的运行位置值;以产生脉冲测试信号的时钟周期为间隔,依次平移脉冲测试信号,且在每次平移脉冲测试信号后,均重新触发及获取运行位置值,直到获取得到进位链中全部运行位置所对应的运行位置值;以及获取进位链的各运行位置值与对应的各脉冲测试信号的位置之间的关系数据,并根据该关系数据得到进位链的各运行位置处的延时时间。本发明能够实时测量出不同进位链之间的延迟时间,避免温度,电压波动的影响,进而能够实现基于FPGA的TDC组件的高精度计时。