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1. WO2022209824 - METHOD FOR MANUFACTURING IMAGE DISPLAY DEVICE, AND IMAGE DISPLAY DEVICE

Publication Number WO/2022/209824
Publication Date 06.10.2022
International Application No. PCT/JP2022/011368
International Filing Date 14.03.2022
IPC
H01L 33/62 2010.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
33Semiconductor devices with at least one potential-jump barrier or surface barrier specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
48characterised by the semiconductor body packages
62Arrangements for conducting electric current to or from the semiconductor body, e.g. leadframe, wire-bond or solder balls
G09F 9/00 2006.1
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
G09F 9/30 2006.1
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30in which the desired character or characters are formed by combining individual elements
G09F 9/33 2006.1
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30in which the desired character or characters are formed by combining individual elements
33being semiconductor devices, e.g. diodes
H01L 21/768 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
768Applying interconnections to be used for carrying current between separate components within a device
H01L 23/522 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
CPC
G09F 9/00
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
G09F 9/30
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30in which the desired character or characters are formed by combining individual elements
G09F 9/33
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
FDISPLAYING; ADVERTISING; SIGNS; LABELS OR NAME-PLATES; SEALS
9Indicating arrangements for variable information in which the information is built-up on a support by selection or combination of individual elements
30in which the desired character or characters are formed by combining individual elements
33being semiconductor devices, e.g. diodes
H01L 21/768
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
H01L 23/522
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 27/15
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
15including semiconductor components with at least one potential-jump barrier or surface barrier specially adapted for light emission
Applicants
  • 日亜化学工業株式会社 NICHIA CORPORATION [JP]/[JP]
Inventors
  • 秋元 肇 AKIMOTO, Hajime
Agents
  • 日向寺 雅彦 HYUGAJI, Masahiko
  • 小崎 純一 KOZAKI, Junichi
  • 内田 敬人 UCHIDA, Takahito
Priority Data
2021-05793430.03.2021JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) METHOD FOR MANUFACTURING IMAGE DISPLAY DEVICE, AND IMAGE DISPLAY DEVICE
(FR) PROCÉDÉ DE FABRICATION DE DISPOSITIF D'AFFICHAGE D'IMAGE, ET DISPOSITIF D'AFFICHAGE D'IMAGE
(JA) 画像表示装置の製造方法および画像表示装置
Abstract
(EN) A method for manufacturing an image display device according to an embodiment comprises: a step of preparing a first substrate including a circuit element formed on a first surface of the substrate, a first wiring layer connected to the circuit element, and a first insulating film that covers the circuit element and the first wiring layer; a step of forming a graphene-including layer on the first insulating film; a step of forming a semiconductor layer including a light-emitting layer on the graphene-including layer; a step of processing the semiconductor layer to form a light-emitting element including a light-emitting surface on the graphene-including layer and a top surface on the side opposite to the light-emitting surface; a step of forming a second insulating film that covers the first insulating film, the graphene-including layer, and the light-emitting element; a step of forming a first via penetrating the first insulating film and the second insulating film; and a step of forming a second wiring layer on the second insulating film.
(FR) Un procédé de fabrication d'un dispositif d'affichage d'image selon un mode de réalisation de la présente invention comprend : une étape de préparation d'un premier substrat comprenant un élément de circuit formé sur une première surface du substrat, une première couche de câblage connectée à l'élément de circuit, et un premier film isolant qui recouvre l'élément de circuit et la première couche de câblage ; une étape de formation d'une couche comprenant du graphène sur le premier film isolant ; une étape de formation d'une couche semi-conductrice comprenant une couche électroluminescente sur la couche comprenant du graphène ; une étape de traitement de la couche semi-conductrice pour former un élément électroluminescent comprenant une surface électroluminescente sur la couche comprenant du graphène et une surface supérieure sur le côté opposé à la surface électroluminescente ; une étape de formation d'un second film isolant qui recouvre le premier film isolant, la couche comprenant du graphène, et l'élément électroluminescent ; une étape de formation d'un premier trou d'interconnexion pénétrant dans le premier film isolant et le second film isolant ; et une étape de formation d'une seconde couche de câblage sur le second film isolant.
(JA) 実施形態に係る画像表示装置の製造方法は、基板の第1面上に形成された回路素子と、前記回路素子に接続された第1配線層と、前記回路素子および前記第1配線層を覆う第1絶縁膜と、を含む第1基板を準備する工程と、前記第1絶縁膜上にグラフェンを含む層を形成する工程と、前記グラフェンを含む層上に発光層を含む半導体層を形成する工程と、前記半導体層を加工して、前記グラフェンを含む層上の発光面と前記発光面の反対側の天面とを含む発光素子を形成する工程と、前記第1絶縁膜、前記グラフェンを含む層および前記発光素子を覆う第2絶縁膜を形成する工程と、前記第1絶縁膜および前記第2絶縁膜を貫通する第1ビアを形成する工程と、前記第2絶縁膜上に第2配線層を形成する工程と、を備える。
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