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1. WO2022204898 - COMPREHENSIVELY OBFUSCATED CRYPTOGRAPHIC ACCELERATORS AND OPERATIONS THEREOF

Publication Number WO/2022/204898
Publication Date 06.10.2022
International Application No. PCT/CN2021/083684
International Filing Date 29.03.2021
IPC
G06F 21/60 2013.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
G06F 21/72 2013.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
72in cryptographic circuits
H04L 9/00 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Arrangements for secret or secure communication
H04L 9/06 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Arrangements for secret or secure communication
06the encryption apparatus using shift registers or memories for blockwise coding, e.g. D.E.S. systems
CPC
G06F 21/602
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
602Providing cryptographic facilities or services
G06F 21/72
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
72in cryptographic circuits
H04L 2209/125
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
2209Additional information or applications relating to cryptographic mechanisms or cryptographic arrangements for secret or secure communication H04L9/00
12Details relating to cryptographic hardware or logic circuitry
125Parallelization or pipelining, e.g. for accelerating processing of cryptographic operations
H04L 9/085
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Cryptographic mechanisms or cryptographic; arrangements for secret or secure communication
08Key distribution ; or management, e.g. generation, sharing or updating, of cryptographic keys or passwords
0816Key establishment, i.e. cryptographic processes or cryptographic protocols whereby a shared secret becomes available to two or more parties, for subsequent use
085Secret sharing or secret splitting, e.g. threshold schemes
Applicants
  • NVIDIA CORPORATION [US]/[US]
  • WANG, Zhili [CN]/[CN] (UG)
Inventors
  • WANG, Zhili
  • YANG, Kun
  • HU, Xinxing
Agents
  • CHINA SINDA INTELLECTUAL PROPERTY LIMITED
Priority Data
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) COMPREHENSIVELY OBFUSCATED CRYPTOGRAPHIC ACCELERATORS AND OPERATIONS THEREOF
(FR) ACCÉLÉRATEURS CRYPTOGRAPHIQUES COMPLÈTEMENT CACHÉS ET LEURS OPÉRATIONS
Abstract
(EN) Apparatuses, systems, and techniques to perform a cryptographic operation using multiple iterations, wherein each iteration includes two or more stages operating in parallel on inputs derived from a common value, one of the stages computing real data and other stages computing dummy data.
(FR) Appareils, systèmes, et techniques permettant d'effectuer une opération cryptographique à l'aide de multiples itérations, chaque itération comprenant au moins deux étages opérant en parallèle sur des entrées dérivées d'une valeur commune, l'un des étages calculant des données réelles et d'autres étages calculant des données factices.
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