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1. WO2022164276 - CIRCUIT BOARD AND PACKAGE SUBSTRATE COMPRISING SAME

Publication Number WO/2022/164276
Publication Date 04.08.2022
International Application No. PCT/KR2022/001645
International Filing Date 28.01.2022
IPC
H05K 1/11 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
11Printed elements for providing electric connections to or between printed circuits
H05K 3/28 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
22Secondary treatment of printed circuits
28Applying non-metallic protective coatings
H01L 23/12 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
H01L 23/31 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulation, e.g. encapsulating layers, coatings
31characterised by the arrangement
CPC
H01L 23/12
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
H01L 23/31
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
H01L 23/3128
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
3107the device being completely enclosed
3121a substrate forming part of the encapsulation
3128the substrate having spherical bumps for external connection
H05K 1/11
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
11Printed elements for providing electric connections to or between printed circuits
H05K 1/111
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
11Printed elements for providing electric connections to or between printed circuits
111Pads for surface mounting, e.g. lay-out
H05K 1/115
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
11Printed elements for providing electric connections to or between printed circuits
115Via connections; Lands around holes or via connections
Applicants
  • 엘지이노텍 주식회사 LG INNOTEK CO., LTD. [KR]/[KR]
Inventors
  • 이상영 LEE, Sang Young
  • 김동민 KIM, Dong Min
  • 배진수 BAE, Jin Soo
Agents
  • 허용록 HAW, Yong Noke
Priority Data
10-2021-001289929.01.2021KR
Publication Language Korean (ko)
Filing Language Korean (KO)
Designated States
Title
(EN) CIRCUIT BOARD AND PACKAGE SUBSTRATE COMPRISING SAME
(FR) CARTE DE CIRCUIT IMPRIMÉ ET SUBSTRAT DE BOÎTIER LA COMPRENANT
(KO) 회로기판 및 이를 포함하는 패키지 기판
Abstract
(EN) A circuit board according to an embodiment comprises: an insulation layer; an electrode layer disposed on the insulation layer; and a protective layer which is disposed on the insulation layer and comprises an opening vertically overlapping at least part of the upper surface of the electrode layer, wherein the electrode layer comprises: a first layer disposed on the insulation layer; a second layer disposed on the first layer; a third layer disposed on the second layer; and a fourth layer disposed on the third layer, the width of the second layer is greater than the width of the third layer, the thickness of the second layer is greater than the thickness of the third layer, and the upper surface of the protective layer is less than or equal to the height of the upper surface of the third layer.
(FR) Une carte de circuit imprimé selon un mode de réalisation comprend : une couche isolante ; une couche d'électrode placée sur la couche isolante ; et une couche de protection qui est placée sur la couche isolante et comprend une ouverture chevauchant verticalement au moins une partie de la surface supérieure de la couche d'électrode, la couche d'électrode comprenant : une première couche placée sur la couche isolante ; une deuxième couche placée sur la première couche ; une troisième couche placée sur la deuxième couche ; et une quatrième couche placée sur la troisième couche, la largeur de la deuxième couche étant supérieure à la largeur de la troisième couche, l'épaisseur de la deuxième couche étant supérieure à l'épaisseur de la troisième couche, et la surface supérieure de la couche de protection étant inférieure ou égale à la hauteur de la surface supérieure de la troisième couche.
(KO) 실시 예에 따른 회로 기판은, 절연층; 상기 절연층 상에 배치된 전극층; 상기 절연층 상에 배치되고, 상기 전극층의 상면의 적어도 일부와 수직으로 중첩된 개구부를 포함하는 보호층을 포함하고, 상기 전극층은, 상기 절연층 상에 배치된 제1층; 상기 제1층 상에 배치된 제2층; 및 상기 제2층 상에 배치된 제3층; 및 상기 제3층 상에 배치된 제4층을 포함하고, 상기 제2층의 폭은 상기 제3층의 폭보다 크고, 상기 제2층의 두께는 상기 제3층의 두께보다 크며, 상기 보호층의 상면은 상기 제3층의 상면의 높이 이하이다.
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