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1. WO2022163763 - METHOD FOR SEALING ELECTRONIC COMPONENT MOUNTING SUBSTRATE, AND HEAT-CURABLE SHEET

Publication Number WO/2022/163763
Publication Date 04.08.2022
International Application No. PCT/JP2022/003123
International Filing Date 27.01.2022
IPC
H01L 23/29 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulation, e.g. encapsulating layers, coatings
29characterised by the material
H01L 23/31 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulation, e.g. encapsulating layers, coatings
31characterised by the arrangement
H01L 21/56 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
56Encapsulations, e.g. encapsulating layers, coatings
CPC
H01L 21/56
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
56Encapsulations, e.g. encapsulation layers, coatings
H01L 23/29
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
29characterised by the material ; , e.g. carbon
H01L 23/31
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
28Encapsulations, e.g. encapsulating layers, coatings, ; e.g. for protection
31characterised by the arrangement ; or shape
Applicants
  • ナガセケムテックス株式会社 NAGASE CHEMTEX CORPORATION [JP]/[JP]
Inventors
  • 大井 陽介 OI Yosuke
  • 浅原 正宏 ASAHARA Masahiro
  • 森 大輔 MORI Daisuke
Agents
  • 弁理士法人河崎特許事務所 KAWASAKI & PARTNERS
Priority Data
2021-01465501.02.2021JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) METHOD FOR SEALING ELECTRONIC COMPONENT MOUNTING SUBSTRATE, AND HEAT-CURABLE SHEET
(FR) PROCÉDÉ DE SCELLEMENT D'UN SUBSTRAT DE MONTAGE DE COMPOSANT ÉLECTRONIQUE, ET FEUILLE THERMODURCISSABLE
(JA) 電子部品実装基板の封止方法および熱硬化性シート
Abstract
(EN) Provided is a method for sealing an electronic component mounting substrate, the method including: a step for preparing an electronic component mounting substrate, which is a substrate on which a plurality of electronic components are mounted, the electronic component mounting substrate being such that spaces are provided between the electronic components and the substrate; a step for placing a heat-curable sheet on the electronic component mounting substrate so as to contact the electronic components; and a step for heating and molding the heat-curable sheet placed on the electronic component mounting substrate, filling the spaces between the electronic components and the substrate with molten material of the heat-curable sheet, and curing the molten material. The distance Lq between the center of the substrate and a point Q at which the outer edge of the heat-curable sheet and a straight line passing through the center of the substrate and a point P intersect, P being a discretionary point on an enclosing line which surrounds all of the plurality of electronic components and with which the surrounded area is minimized, is equal to or greater than 0.9 Lp, where Lp is the distance between the center of the substrate and the point P.
(FR) L'invention concerne un procédé pour sceller un substrat de montage de composant électronique, le procédé comprenant : une étape de préparation d'un substrat de montage de composant électronique, qui est un substrat sur lequel une pluralité de composants électroniques sont montés, le substrat de montage de composant électronique étant tel que des espaces sont disposés entre les composants électroniques et le substrat ; une étape consistant à placer une feuille thermodurcissable sur le substrat de montage de composant électronique de manière à faire le contact avec les composants électroniques ; et une étape de chauffage et de moulage de la feuille thermodurcissable placée sur le substrat de montage de composant électronique, remplissant les espaces entre les composants électroniques et le substrat avec un matériau fondu de la feuille thermodurcissable, et à durcissant le matériau fondu. La distance Lq entre le centre du substrat et un point Q au Niveau duquel le bord externe de la feuille thermodurcissable et une ligne droite passant par le centre du substrat et un point P se croisent, P étant un point discrétionnaire sur une ligne d'enveloppement qui entoure l'ensemble de la pluralité de composants électroniques et avec laquelle la zone entourée est minimisée, est égale ou supérieure à 0,9 Lp, Lp étant la distance entre le centre du substrat et le point P.
(JA) 複数の電子部品が実装された基板であって、電子部品と基板との間に空間が設けられている電子部品実装基板を準備する工程と、電子部品と接するように熱硬化性シートを電子部品実装基板に載置する工程と、載置された熱硬化性シートを加熱成型し、電子部品と基板との間の空間に熱硬化性シートの溶融物を充填して硬化させる工程とを含み、複数の電子部品を全て囲うとともに囲まれた面積が最小になる枠線上の任意の点Pと、基板の中心との距離をLpとするとき、点Pと基板の中心とを通る直線と熱硬化性シートの外縁とが交わる点Qと、基板の中心との距離Lqが0.9Lp以上である、電子部品実装基板の封止方法。
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