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1. WO2022163588 - CORE SUBSTRATE AND INTERPOSER

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Publication Number WO/2022/163588
Publication Date 04.08.2022
International Application No. PCT/JP2022/002456
International Filing Date 24.01.2022
IPC
H01L 25/065 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/78
H01L 25/07 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/78
H01L 25/18 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
CPC
H01L 2224/16225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
15Structure, shape, material or disposition of the bump connectors after the connecting process
16of an individual bump connector
161Disposition
16151the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
16221the body and the item being stacked
16225the item being non-metallic, e.g. insulating substrate with or without metallisation
H01L 23/12
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
12Mountings, e.g. non-detachable insulating substrates
H01L 25/065
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
03all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
04the devices not having separate containers
065the devices being of a type provided for in group H01L27/00
H01L 25/07
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
03all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L51/00, e.g. assemblies of rectifier diodes
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/00
H01L 25/18
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; ; Multistep manufacturing processes thereof
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/00 - H01L51/00
H01L 2924/15311
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2924Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
15Details of package parts other than the semiconductor or other solid state devices to be connected
151Die mounting substrate
153Connection portion
1531the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
15311being a ball array, e.g. BGA
Applicants
  • 日本碍子株式会社 NGK INSULATORS, LTD. [JP]/[JP]
Inventors
  • 若園　芳嗣 WAKAZONO Yoshitsugu
  • 谷　信 TANI Makoto
Agents
  • 吉竹　英俊 YOSHITAKE Hidetoshi
  • 有田　貴弘 ARITA Takahiro
  • 中尾　和樹 NAKAO Kazuki
  • 喜多　弘行 KITA Hiroyuki
Priority Data
PCT/JP2021/00332129.01.2021JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) CORE SUBSTRATE AND INTERPOSER
(FR) SUBSTRAT CENTRAL ET INTERPOSEUR
(JA) コア基板およびインターポーザ
front page image
Abstract
(EN) Provided is a core substrate (601) for constituting an interposer (700) on which a semiconductor element (811) is mounted, the core substrate (601) incorporating an inductor. The core substrate (601) comprises a ceramic substrate (100), a conductor portion (201), and a magnetic material portion (301). The ceramic substrate (100) has a first surface (SF1) and a second surface (SF2) opposite the first surface (SF1) in a thickness direction, and includes a through-hole (HL1) between the first surface (SF1) and the second surface (SF2). The conductor portion (201) extends through the through-hole (HL1). The magnetic material portion (301) surrounds the conductor portion (201) in the through-hole (HL1), and is made of ceramics. The conductor portion (201) is made of sintered metal.
(FR) L'invention concerne un substrat central (601) pour constituer un interposeur (700) sur lequel est monté un élément semi-conducteur (811), le substrat central (601) incorporant un inducteur. Le substrat central (601) comprend un substrat céramique (100), une partie conductrice (201) et une partie de matériau magnétique (301). Le substrat céramique (100) présente une première surface (SF1) et une seconde surface (SF2) opposée à la première surface (SF1) dans le sens de l'épaisseur, et comprend un trou traversant (HL1) entre la première surface (SF1) et la seconde surface (SF2). La partie conductrice (201) s'étend à travers le trou traversant (HL1). La partie de matériau magnétique (301) entoure la partie conductrice (201) dans le trou traversant (HL1), et est constituée de céramique. La partie conductrice (201) est constituée d'un métal fritté.
(JA) コア基板（６０１）は、半導体素子（８１１）が搭載されるインターポーザ（７００）を構成するための、インダクタが内蔵されたコア基板（６０１）である。コア基板（６０１）は、セラミック基板（１００）と、導体部（２０１）と、磁性体部（３０１）とを有している。セラミック基板（１００）は、第１面（ＳＦ１）と、厚み方向において第１面（ＳＦ１）と反対の第２面（ＳＦ２）とを有しており、第１面（ＳＦ１）と第２面（ＳＦ２）との間に貫通孔（ＨＬ１）を有している。導体部（２０１）は貫通孔（ＨＬ１）を貫通している。磁性体部（３０１）は、貫通孔（ＨＬ１）において導体部（２０１）を囲んでおり、セラミックスからなる。導体部（２０１）は焼結金属からなる。
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