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1. WO2022118055 - SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SAME

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Publication Number WO/2022/118055
Publication Date 09.06.2022
International Application No. PCT/IB2020/000995
International Filing Date 01.12.2020
Chapter 2 Demand Filed 05.07.2021
IPC
H01L 29/78 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
H01L 21/336 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
CPC
H01L 29/66477
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66477with an insulated gate, i.e. MISFET
H01L 29/78
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
Applicants
  • 日産自動車株式会社 NISSAN MOTOR CO., LTD. [JP]/[JP]
  • ルノー エス. ア. エス.　 RENAULT S.A.S. [FR]/[FR]
Inventors
  • 倪　威 NI, Wei
  • 林　哲也 HAYASHI, Tetsuya
  • 沼倉　啓一郎 NUMAKURA, Keiichiro
  • 丸井　俊治 MARUI, Toshiharu
  • 田中　亮太 TANAKA, Ryouta
  • 岩﨑　裕一 IWASAKI, Yuichi
Agents
  • 三好　秀和 MIYOSHI, Hidekazu
  • TAKAHASHI, Shunichi
  • ITO, Masakazu
  • TAKAMATSU, Toshio
Priority Data
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE, AND MANUFACTURING METHOD FOR SAME
(FR) DISPOSITIF À SEMI-CONDUCTEUR ET SON PROCÉDÉ DE FABRICATION
(JA) 半導体装置及びその製造方法
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Abstract
(EN) A semiconductor device comprises: a drift region that is arranged on a main surface of a substrate, and has a higher impurity concentration than the substrate; a first well region connected to the drift region; and a second well region that is arranged adjacent to the first well region and faces the drift region. The second well region has a higher impurity concentration than the first well region. In a direction parallel to the main surface of the substrate, the distance between a source region facing the drift region and the drift region with the first well region interposed therebetween is longer than the distance between the second well region and the drift region. A depletion layer extending from the second well region reaches the drift region.
(FR) La présente invention concerne un dispositif à semi-conducteur qui comprend : une région de dérive qui est disposée sur une surface principale d'un substrat, et contient une concentration d'impuretés plus élevée que le substrat; une première région de puits reliée à la région de dérive; et une seconde région de puits qui est disposée de manière adjacente à la première région de puits et en regard de la région de dérive. La seconde région de puits contient une concentration d'impuretés plus élevée que la première région de puits. Dans une direction parallèle à la surface principale du substrat, la distance entre une région source faisant face à la région de dérive et la région de dérive avec la première région de puits interposée entre elles est plus longue que la distance entre la seconde région de puits et la région de dérive. Une couche d'appauvrissement s'étendant à partir de la seconde région de puits atteint la région de dérive.
(JA) 半導体装置は、基板の主面に配置された、基板よりも不純物濃度が高いドリフト領域と、ドリフト領域と接続する第1ウェル領域と、第1ウェル領域に隣接して配置されてドリフト領域と対向する第2ウェル領域を備える。第2ウェル領域は、第1ウェル領域よりも不純物濃度が高い。基板の主面と平行な方向において、第1ウェル領域を介してドリフト領域と対向するソース領域とドリフト領域の間の距離は、第2ウエル領域とドリフト領域の間の距離よりも長い。第2ウェル領域から延伸する空乏層は、ドリフト領域に到達する。
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