Processing

Please wait...

Settings

Settings

Goto Application

1. WO2022113813 - IMAGING ELEMENT PACKAGE, MANUFACTURING METHOD, AND ELECTRONIC APPARATUS

Publication Number WO/2022/113813
Publication Date 02.06.2022
International Application No. PCT/JP2021/042006
International Filing Date 16.11.2021
IPC
H01L 27/146 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
14including semiconductor components sensitive to infra-red radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
144Devices controlled by radiation
146Imager structures
H01L 21/3205 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers; Selection of materials for these layers
3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers, on insulating layers; After-treatment of these layers
H01L 21/447 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
34the devices having semiconductor bodies not provided for in groups H01L21/06, H01L21/16, and H01L21/18159
44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/36-H01L21/428158
447involving the application of pressure, e.g. thermo-compression bonding
H01L 21/60 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 21/603 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
603involving the application of pressure, e.g. thermo-compression bonding
H01L 21/768 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
71Manufacture of specific parts of devices defined in group H01L21/7086
768Applying interconnections to be used for carrying current between separate components within a device
CPC
H01L 21/3205
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
31to form insulating layers thereon, e.g. for masking or by using photolithographic techniques
3205Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
H01L 21/447
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
34the devices having semiconductor bodies not provided for in groups ; H01L21/0405, H01L21/0445; , H01L21/06, H01L21/16 and H01L21/18 with or without impurities, e.g. doping materials
44Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/38 - H01L21/428
447involving the application of pressure, e.g. thermo-compression bonding
H01L 21/60
H01L 21/603
H01L 21/768
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
H01L 2224/32225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
31Structure, shape, material or disposition of the layer connectors after the connecting process
32of an individual layer connector
321Disposition
32151the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
32221the body and the item being stacked
32225the item being non-metallic, e.g. insulating substrate with or without metallisation
Applicants
  • ソニーセミコンダクタソリューションズ株式会社 SONY SEMICONDUCTOR SOLUTIONS CORPORATION [JP]/[JP]
Inventors
  • 原 祐司 HARA Yuji
  • 晴山 耕佑 HAREYAMA Kosuke
Agents
  • 西川 孝 NISHIKAWA Takashi
  • 稲本 義雄 INAMOTO Yoshio
  • 三浦 勇介 MIURA Yusuke
Priority Data
2020-19848630.11.2020JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) IMAGING ELEMENT PACKAGE, MANUFACTURING METHOD, AND ELECTRONIC APPARATUS
(FR) BOÎTIER D'ÉLÉMENT D'IMAGERIE, PROCÉDÉ DE FABRICATION ET APPAREIL ÉLECTRONIQUE
(JA) 撮像素子パッケージおよび製造方法、並びに電子機器
Abstract
(EN) The present disclosure pertains to an imaging element package, a manufacturing method, and an electronic apparatus, configured to enable further improvement in reliability. The imaging element package comprises: a solid-state imaging element which has a first pad; a substrate which has a second pad and on which the solid-state imaging element is mounted; and a wire wiring that connects, with metal wires, the first pad and the second pad. The wire wiring includes: a ball part that is bonded to the first pad in a shape such that the thickness of the ball part is at least the depth of an opening provided in the solid-state imaging element so as to cause the first pad to be open; and a crescent part that is provided as a result of an end of the metal wires being pressed onto the ball part and thereby bonded to the ball part, and that is connected between the metal wires at a connection length of at least a prescribed proportion. This technology is applicable, for example, to an imaging element package in which a chip of a solid-state imaging element or the like is packaged.
(FR) La présente invention concerne un boîtier d'élément d'imagerie, un procédé de fabrication et un appareil électronique, configurés pour permettre une amélioration supplémentaire de la fiabilité. Le boîtier d'élément d'imagerie comprend : un élément d'imagerie à semi-conducteur qui a une première pastille ; un substrat qui a une seconde pastille et sur lequel l'élément d'imagerie à semi-conducteur est monté ; et un câblage de fil qui relie, avec des fils métalliques, la première pastille et la seconde pastille. Le câblage de fil comprend : une partie de bille qui est liée à la première pastille sous une forme telle que l'épaisseur de la partie de bille est au moins la profondeur d'une ouverture prévue dans l'élément d'imagerie à semi-conducteur de façon à amener la première pastille à être ouverte ; et une partie en croissant qui est disposée du fait qu'une extrémité des fils métalliques est pressée sur la partie de bille et ainsi liée à la partie de bille, et qui est connectée entre les fils métalliques à une longueur de connexion d'au moins une proportion prescrite. Cette technologie peut être appliquée, par exemple, à un boîtier d'élément d'imagerie dans lequel une puce d'un élément d'imagerie à semi-conducteur ou similaire est conditionnée.
(JA) 本開示は、より信頼性の向上を図ることができるようにする撮像素子パッケージおよび製造方法、並びに電子機器に関する。 撮像素子パッケージは、第1のパッドを有する固体撮像素子と、固体撮像素子が搭載され、第2のパッドを有する基板と、第1のパッドと第2のパッドとを金属ワイヤーによって接続するワイヤー配線とを備える。そして、ワイヤー配線は、固体撮像素子において第1のパッドを開口させるために設けられる開口部の深さ以上の厚みとなる形状で、第1のパッドに対して接合されるボール部と、ボール部に金属ワイヤーの端部が押圧されてボール部に対して接合されることにより設けられ、金属ワイヤーとの間で所定の割合以上の接続長さで接続されるクレセント部とを有する。本技術は、例えば、固体撮像素子などのチップをパッケージ化した撮像素子パッケージに適用できる。
Latest bibliographic data on file with the International Bureau