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1. WO2022111160 - CELLULAR STRUCTURE OF SILICON CARBIDE DEVICE, METHOD FOR PREPARATION THEREOF, AND SILICON CARBIDE DEVICE

Publication Number WO/2022/111160
Publication Date 02.06.2022
International Application No. PCT/CN2021/125473
International Filing Date 22.10.2021
IPC
H01L 29/06 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
02Semiconductor bodies
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions
H01L 29/786 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
786Thin-film transistors
H01L 21/336 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
336with an insulated gate
CPC
H01L 29/0623
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0603characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
0607for preventing surface leakage or controlling electric field concentration
0611for increasing or controlling the breakdown voltage of reverse biased devices
0615by the doping profile or the shape or the arrangement of the PN junction, or with supplementary regions, e.g. junction termination extension [JTE]
0619with a supplementary region doped oppositely to or in rectifying contact with the semiconductor containing or contacting region, e.g. guard rings with PN or Schottky junction
0623Buried supplementary region, e.g. buried guard ring
H01L 29/0696
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
02Semiconductor bodies ; ; Multistep manufacturing processes therefor
06characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; ; characterised by the concentration or distribution of impurities within semiconductor regions
0684characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
0692Surface layout
0696of cellular field-effect devices, e.g. multicellular DMOS transistors or IGBTs
H01L 29/66068
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66053of devices having a semiconductor body comprising crystalline silicon carbide
66068the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
H01L 29/78606
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
786Thin film transistors, ; i.e. transistors with a channel being at least partly a thin film
78606with supplementary region or layer in the thin film or in the insulated bulk substrate supporting it for controlling or increasing the safety of the device
H01L 29/78642
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
786Thin film transistors, ; i.e. transistors with a channel being at least partly a thin film
78642Vertical transistors
H01L 29/78645
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
78with field effect produced by an insulated gate
786Thin film transistors, ; i.e. transistors with a channel being at least partly a thin film
78645with multiple gate
Applicants
  • 株洲中车时代半导体有限公司 ZHUZHOU CRRC TIMES SEMICONDUCTOR CO., LTD. [CN]/[CN]
Inventors
  • 王亚飞 WANG, Yafei
  • 罗海辉 LUO, Haihui
  • 李诚瞻 LI, Chengzhan
  • 罗烨辉 LUO, Yehui
  • 张文杰 ZHANG, Wenjie
Agents
  • 北京聿宏知识产权代理有限公司 YUHONG INTELLECTUAL PROPERTY LAW FIRM
Priority Data
202011354573.627.11.2020CN
Publication Language Chinese (zh)
Filing Language Chinese (ZH)
Designated States
Title
(EN) CELLULAR STRUCTURE OF SILICON CARBIDE DEVICE, METHOD FOR PREPARATION THEREOF, AND SILICON CARBIDE DEVICE
(FR) STRUCTURE CELLULAIRE DE DISPOSITIF EN CARBURE DE SILICIUM, SON PROCÉDÉ DE PRÉPARATION ET DISPOSITIF EN CARBURE DE SILICIUM
(ZH) 碳化硅器件的元胞结构、其制备方法及碳化硅器件
Abstract
(EN) Provided are a cellular structure of a silicon carbide device, a method for preparation thereof, and a silicon carbide device, the cellular structure comprising: a plurality of second conductive-type well regions (203) arranged at intervals within the surface of a drift layer (202); a source region located within the surface of the well regions (203); a gate trench located between two adjacent well regions (203); a second conductive-type shielding region (206) located within the drift layer (202) and arranged longitudinally spaced below the gate trench; the top of the shielding region (206) is in contact with the bottom of the gate trench and the bottom of the well regions (203). By means of arranging a longitudinally spaced second conductive-type shielding region (206) at the bottom of the gate trench, the electric field stress on the gate dielectric layer of a device in a blocked state can be significantly reduced, substantially improving the long-term usage reliability of the device; the shielding region (206) is electrically connected to a source metal layer (211) and can increase the switching frequency of the device, reducing switching loss.
(FR) L'invention concerne une structure cellulaire d'un dispositif en carbure de silicium, son procédé de préparation, et un dispositif en carbure de silicium, la structure cellulaire comprenant : une pluralité de secondes régions de puits de type conducteur (203) disposées à intervalles à l'intérieur de la surface d'une couche de dérive (202) ; une région de source située à l'intérieur de la surface des régions de puits (203) ; une tranchée de grille située entre deux régions de puits adjacentes (203) ; une seconde région de blindage de type conducteur (206) située à l'intérieur de la couche de dérive (202) et disposée longitudinalement espacée au-dessous de la tranchée de grille ; la partie supérieure de la région de blindage (206) est en contact avec le fond de la tranchée de grille et le fond des régions de puits (203). Au moyen de l'agencement d'une seconde région de blindage de type conducteur espacée longitudinalement (206) au fond de la tranchée de grille, la contrainte de champ électrique sur la couche diélectrique de grille d'un dispositif dans un état bloqué peut être significativement réduite, améliorant sensiblement la fiabilité d'utilisation à long terme du dispositif ; la zone de blindage (206) est électriquement connectée à une couche métallique source (211) et peut augmenter la fréquence de commutation du dispositif, réduisant la perte de commutation.
(ZH) 一种碳化硅器件的元胞结构、其制备方法及碳化硅器件,元胞结构包括:多个间隔设置于漂移层(202)表面内的第二导电类型阱区(203);位于阱区(203)表面内的源区;位于相邻两个阱区(203)之间的栅极沟槽;位于漂移层(202)内且纵向间隔设置于栅极沟槽下方的第二导电类型屏蔽区(206);其中,屏蔽区(206)的顶部与栅极沟槽的底部和阱区(203)的底部接触。通过在栅极沟槽底部设置纵向间隔的第二导电类型的屏蔽区(206),可大幅降低阻断状态下器件的栅极介质层的电场应力,大幅提高器件的长期使用可靠性;屏蔽区(206)与源极金属层(211)电连接,可以提高器件的开关频率,降低开关损耗。
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