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1. WO2022093460 - THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY (DRAM) AND METHODS OF FORMING THE SAME

Publication Number WO/2022/093460
Publication Date 05.05.2022
International Application No. PCT/US2021/052222
International Filing Date 27.09.2021
IPC
H01L 27/108 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
10including a plurality of individual components in a repetitive configuration
105including field-effect components
108Dynamic random access memory structures
H01L 49/02 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
02Thin-film or thick-film devices
Applicants
  • APPLIED MATERIALS, INC. [US]/[US]
Inventors
  • KANG, Changseok
  • KITAJIMA, Tomohiko
  • KANG, Sung Kwan
  • FISHBURN, Fredrick
  • LEE, Gill Yong
  • INGLE, Nitin K.
Agents
  • PATTERSON, B. Todd
  • HAMMACK, Marcus W.
Priority Data
63/108,61202.11.2020US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) THREE-DIMENSIONAL DYNAMIC RANDOM ACCESS MEMORY (DRAM) AND METHODS OF FORMING THE SAME
(FR) MÉMOIRE VIVE DYNAMIQUE TRIDIMENSIONNELLE (DRAM), ET LEURS PROCÉDÉS DE FORMATION
Abstract
(EN) Examples herein relate to three-dimensional (3D) dynamic random access memory (DRAM) and corresponding methods. In an example, a film stack is formed on a substrate. The film stack includes multiple unit stacks, each having, sequentially, a first dielectric layer, a semiconductor layer, and a second dielectric layer. A first opening is formed through the film stack. The second dielectric layer is pulled back from the first opening forming a first lateral recess. A gate structure is formed in the first lateral recess and disposed on a portion of the semiconductor layer. A second opening, laterally disposed from where the first opening was formed, is formed through the film stack. The portion of the semiconductor layer is pulled back from the second opening forming a second lateral recess. A capacitor is formed in a region where the second lateral recess was disposed and contacting the portion of the semiconductor layer.
(FR) Des exemples de la présente invention concernent une mémoire vive dynamique (DRAM) tridimensionnelle et des procédés correspondants. Dans un exemple, un empilement de films est formé sur un substrat. L'empilement de films comprend de multiples empilements unitaires, chacun ayant, de manière séquentielle, une première couche diélectrique, une couche semi-conductrice et une seconde couche diélectrique. Une première ouverture est formée à travers l'empilement de films. La seconde couche diélectrique est retirée de la première ouverture en formant un premier évidement latéral. Une structure de grille est formée dans le premier évidement latéral et disposée sur une partie de la couche semi-conductrice. Une seconde ouverture, disposée latéralement à partir de laquelle la première ouverture a été formée, est formée à travers l'empilement de films. La partie de la couche semi-conductrice est retirée de la seconde ouverture en formant un second évidement latéral. Un condensateur est formé dans une région où le second évidement latéral a été disposé et en contact avec la partie de la couche semi-conductrice.
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