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1. WO2022046391 - PACKAGE AND SUBSTRATE COMPRISING INTERCONNECTS WITH SEMI-CIRCULAR PLANAR SHAPE AND/OR TRAPEZOID PLANAR SHAPE

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Publication Number WO/2022/046391
Publication Date 03.03.2022
International Application No. PCT/US2021/044996
International Filing Date 06.08.2021
IPC
H01L 23/522 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/528 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528Layout of the interconnection structure
H01L 21/48 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/06-H01L21/326201
H01L 23/498 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads or terminal arrangements
488consisting of soldered or bonded constructions
498Leads on insulating substrates
H01L 23/538 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
CPC
H01L 21/4857
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
4814Conductive parts
4846Leads on or in insulating or insulated substrates, e.g. metallisation
4857Multilayer substrates
H01L 21/486
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
4814Conductive parts
4846Leads on or in insulating or insulated substrates, e.g. metallisation
486Via connections through the substrate with or without pins
H01L 21/76802
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
71Manufacture of specific parts of devices defined in group H01L21/70
768Applying interconnections to be used for carrying current between separate components within a device ; comprising conductors and dielectrics
76801characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
76802by forming openings in dielectrics
H01L 23/49822
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
49822Multilayer substrates
H01L 23/5226
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
5226Via connections in a multilevel interconnection structure
H01L 23/528
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
528Geometry or; layout of the interconnection structure
Applicants
  • QUALCOMM INCORPORATED [US]/[US]
Inventors
  • PATIL, Aniket
  • BUOT, Joan Rey Villarba
  • WE, Hong Bok
Agents
  • THAVONEKHAM, S. Sean
Priority Data
17/002,61525.08.2020US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) PACKAGE AND SUBSTRATE COMPRISING INTERCONNECTS WITH SEMI-CIRCULAR PLANAR SHAPE AND/OR TRAPEZOID PLANAR SHAPE
(FR) EMBALLAGE ET SUBSTRAT COMPRENANT DES INTERCONNEXIONS AVEC UNE FORME PLANE SEMI-CIRCULAIRE ET/OU UNE FORME PLANE TRAPÉZOÏDALE
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Abstract
(EN) A substrate that includes at least one dielectric layer, a plurality of first interconnects located in the at least one dielectric layer, at least one photo-imageable dielectric layer coupled to the at least one dielectric layer, and a plurality of second interconnects located in the at least one photo-imageable dielectric layer. The plurality of second interconnects includes at least one pair of adjacent interconnects having a centroid to centroid distance that is less than a pitch between the pair of interconnects. The pair of adjacent interconnects may include a pair of adjacent via interconnects and/or a pair of pad interconnects. The substrate may include a coreless substrate or a cored substrate.
(FR) La présente invention concerne un substrat qui comprend au moins une couche diélectrique, une pluralité de premières interconnexions situées dans ladite couche diélectrique, au moins une couche diélectrique photo-imageable accouplée à ladite couche diélectrique, et une pluralité de secondes interconnexions situées dans ladite couche diélectrique photo-imageable. La pluralité de secondes interconnexions comprend au moins une paire d'interconnexions adjacentes ayant un centroïde à une distance centroïde qui est inférieure à un pas entre la paire d'interconnexions. La paire d'interconnexions adjacentes peut comprendre une paire d'interconnexions de trous d'interconnexion adjacents et/ou une paire d'interconnexions de pastilles. Le substrat peut comprendre un substrat sans noyau ou un substrat avec noyau.
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