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1. WO2022046167 - THREE-DIMENSIONAL METAL-INSULATOR-METAL (MIM) CAPACITOR

Publication Number WO/2022/046167
Publication Date 03.03.2022
International Application No. PCT/US2021/019784
International Filing Date 26.02.2021
IPC
H01L 49/02 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
49Solid state devices not provided for in groups H01L27/-H01L47/99; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof
02Thin-film or thick-film devices
H01L 23/522 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
522including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
H01L 23/64 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
58Structural electrical arrangements for semiconductor devices not otherwise provided for
64Impedance arrangements
H01L 23/00 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
CPC
H01L 2224/034
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
034by blanket deposition of the material of the bonding area
H01L 2224/0348
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
0347using a lift-off mask
0348Permanent masks, i.e. masks left in the finished device, e.g. passivation layers
H01L 2224/0361
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
036by patterning a pre-deposited material
0361Physical or chemical etching
H01L 2224/03616
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
03Manufacturing methods
036by patterning a pre-deposited material
0361Physical or chemical etching
03616Chemical mechanical polishing [CMP]
H01L 2224/05022
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
05001Internal layers
0502Disposition
05022the internal layer being at least partially embedded in the surface
H01L 2224/05096
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
05of an individual bonding area
05001Internal layers
05075Plural internal layers
0508being stacked
05085with additional elements, e.g. vias arrays, interposed between the stacked layers
05089Disposition of the additional element
05093of a plurality of vias
05096Uniform arrangement, i.e. array
Applicants
  • MICROCHIP TECHNOLOGY INCORPORATED [US]/[US]
Inventors
  • LENG, Yaojian
  • SATO, Justin
Agents
  • SLAYDEN, Bruce W., II
Priority Data
17/155,43122.01.2021US
63/070,29426.08.2020US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) THREE-DIMENSIONAL METAL-INSULATOR-METAL (MIM) CAPACITOR
(FR) CONDENSATEUR MÉTAL-ISOLANT-MÉTAL (MIM) EN TROIS DIMENSIONS
Abstract
(EN) A three-dimensional metal-insulator-metal (MIM) capacitor is formed in an integrated circuit structure. The 3D MIM capacitor may include a bottom conductor including a bottom plate portion (e.g., formed in a metal interconnect layer) and vertically-extending sidewall portions extending from the bottom plate portion. An insulator layer is formed on the bottom plate portion and the vertically extending sidewall portions of the bottom conductor. A top conductor is formed over the insulating layer, such that the top conductor is capacitively coupled to both the bottom plate portion and the vertically extending sidewall portions of the bottom conductor, to thereby define an increased area of capacitive coupling between the top and bottom conductors. The vertically extending sidewall portions of the bottom conductor may be formed in a single metal layer or by components of multiple metal layers.
(FR) Un condensateur métal-isolant-métal (MIM) en trois dimensions est formé dans une structure de circuit intégré. Le condensateur MIM 3D peut comporter un conducteur inférieur comportant une partie de plaque inférieure (par exemple formée dans une couche d'interconnexion métallique) et des parties de paroi latérale s'étendant verticalement s'étendant à partir de la partie de plaque inférieure. Une couche isolante est formée sur la partie de plaque inférieure et les parties de paroi latérale s'étendant verticalement du conducteur inférieur. Un conducteur supérieur est formé sur la couche isolante, de sorte que le conducteur supérieur est couplé de manière capacitive à la fois à la partie de plaque inférieure et aux parties de paroi latérale s'étendant verticalement du conducteur inférieur, pour ainsi définir une zone accrue de couplage capacitif entre les conducteurs supérieur et inférieur. Les parties de paroi latérale s'étendant verticalement du conducteur inférieur peuvent être formées dans une seule couche métallique ou par des composants de multiples couches métalliques.
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