Processing

Please wait...

PATENTSCOPE will be unavailable a few hours for maintenance reason on Tuesday 25.01.2022 at 9:00 AM CET
Settings

Settings

Goto Application

1. WO2022009556 - SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE

Publication Number WO/2022/009556
Publication Date 13.01.2022
International Application No. PCT/JP2021/020530
International Filing Date 28.05.2021
IPC
H01L 25/07 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/78
H01L 25/18 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
18the devices being of types provided for in two or more different subgroups of the same main group of groups H01L27/-H01L51/160
H01L 21/60 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
H01L 21/607 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
607involving the application of mechanical vibrations, e.g. ultrasonic vibrations
H05K 1/02 2006.1
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
Applicants
  • 富士電機株式会社 FUJI ELECTRIC CO., LTD. [JP]/[JP]
Inventors
  • 伊藤 太一 ITOH, Taichi
Agents
  • 特許業務法人扶桑国際特許事務所 FUSO INTERNATIONAL PATENT FIRM
Priority Data
2020-11864809.07.2020JP
Publication Language Japanese (ja)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE
(FR) DISPOSITIF SEMICONDUCTEUR ET PROCÉDÉ DE FABRICATION DE DISPOSITIF SEMICONDUCTEUR
(JA) 半導体装置及び半導体装置の製造方法
Abstract
(EN) A purpose of the present invention is to prevent positional deviation in a bonding location of a leg part of a lead frame. This leg part (64) is also provided with a vertical section (64a) and split sections (64b, 64c). The vertical section (64a) extends in a direction perpendicular to a circuit pattern (42). The split section (64b) bends in a prescribed direction from a branching section (64a1) of a lower end section on the circuit pattern (42) side of the vertical section (64a), extends parallel to the circuit pattern (42), and is bonded to the circuit pattern (42). The split section (64c) bends from the branching section (64a1) in a direction opposite the prescribed direction, extends parallel to the circuit pattern (42), and is bonded to the circuit pattern (42). With such a leg part (64), a front surface side and a back surface side of the vertical section (64a) are reliably supported by the split sections (64b, 64c), respectively.
(FR) L'objectif de la présente invention est d'empêcher un écart de position dans un emplacement de liaison d'une partie de patte d'une grille de connexion. Cette partie de patte (64) est également pourvue d'une section verticale (64a) et de sections fendues (64b, 64c). La section verticale (64a) s'étend dans une direction perpendiculaire à un motif de circuit (42). La section fendue (64b) se courbe dans une direction prescrite à partir d'une section de ramification (64a1) d'une section d'extrémité inférieure sur le côté du motif de circuit (42) de la section verticale (64a), s'étend parallèlement au motif de circuit (42) et est liée au motif de circuit (42). La section fendue (64c) se courbe à partir de la section de ramification (64a1) dans une direction opposée à la direction prescrite, s'étend parallèlement au motif de circuit (42) et est liée au motif de circuit (42). Avec une telle partie de patte (64), un côté de surface avant et un côté de surface arrière de la section verticale (64a) sont supportés de manière fiable par les sections fendues (64b, 64c), respectivement.
(JA) リードフレームの脚部の接合箇所の位置ずれを防止する。 脚部(64)は、垂直部(64a)と分割部(64b,64c)とをさらに備える。垂直部(64a)は、回路パターン(42)に対して鉛直方向に延伸する。分割部(64b)は、垂直部(64a)の回路パターン(42)側の下端部の分岐部(64a1)から所定方向に屈曲し回路パターン(42)に対して平行に延伸して、回路パターン(42)に接合される。分割部(64c)は、分岐部(64a1)から所定方向の反対方向に屈曲し回路パターン(42)に対して平行に延伸して、回路パターン(42)に接合される。このような脚部(64)では、垂直部(64a)がおもて面側、裏面側がそれぞれ分割部(64b,64c)で確実に支持される。
Latest bibliographic data on file with the International Bureau