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1. WO2022009086 - INTERPOSER-LESS MULTI-CHIP MODULE

Publication Number WO/2022/009086
Publication Date 13.01.2022
International Application No. PCT/IB2021/056039
International Filing Date 06.07.2021
IPC
H01L 23/00 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
CPC
H01L 2224/04105
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
H01L 2224/12105
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
12105Bump connectors formed on an encapsulation of the semiconductor or solid-state body, e.g. bumps on chip-scale packages
H01L 2224/24137
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
18High density interconnect [HDI] connectors; Manufacturing methods related thereto
23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
24of an individual high density interconnect connector
241Disposition
24135Connecting between different semiconductor or solid-state bodies, i.e. chip-to-chip
24137the bodies being arranged next to each other, e.g. on a common substrate
H01L 2224/24195
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
18High density interconnect [HDI] connectors; Manufacturing methods related thereto
23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
24of an individual high density interconnect connector
241Disposition
24151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
24153the body and the item being arranged next to each other, e.g. on a common substrate
24195the item being a discrete passive component
H01L 2224/29188
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
28Structure, shape, material or disposition of the layer connectors prior to the connecting process
29of an individual layer connector
29001Core members of the layer connector
29099Material
29186with a principal constituent of the material being a non metallic, non metalloid inorganic material
29188Glasses, e.g. amorphous oxides, nitrides or fluorides
H01L 2224/2919
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
28Structure, shape, material or disposition of the layer connectors prior to the connecting process
29of an individual layer connector
29001Core members of the layer connector
29099Material
2919with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US]
  • IBM UNITED KINGDOM LIMITED [GB]/[GB] (MG)
  • IBM (CHINA) INVESTMENT COMPANY LIMITED [CN]/[CN] (MG)
Inventors
  • LEOBANDUNG, Effendi
Agents
  • WILLIAMS, Julian
Priority Data
16/925,13309.07.2020US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) INTERPOSER-LESS MULTI-CHIP MODULE
(FR) MODULE MULTI-PUCE SANS INTERPOSEUR
Abstract
(EN) Interposer-less multi-chip module are provided. In one aspect, an interposer-less multi-chip module includes: a substrate; a base film disposed on the substrate; and chips pressed into the base film, wherein top surfaces of the chips are coplanar. For instance, the chips can have varying thicknesses and are pressed into the base film to different depths such that top surfaces of the chips are coplanar. An interconnect layer having back-end-of line (BEOL) metal wiring can be present on the wafer over the chips. Methods of forming an interposer-less multi-chip module are also provided.
(FR) L'invention concerne un module multi-puce sans interposeur. Selon un aspect, un module multi-puce sans interposeur comprend : un substrat ; un film de base disposé sur le substrat ; et des puces pressées dans le film de base, les surfaces supérieures des puces étant coplanaires. Par exemple, les puces peuvent avoir des épaisseurs variables et sont pressées dans le film de base à différentes profondeurs de telle sorte que les surfaces supérieures des puces sont coplanaires. Une couche d'interconnexion ayant un câblage métallique BEOL ("back-end-of line") peut être présente sur la tranche au-dessus des puces. Des procédés de formation d'un module multi-puce sans interposeur sont également décrits.
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