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1. WO2022008977 - FIN FIELD EFFECT TRANSISTOR WITH FIELD PLATING

Publication Number WO/2022/008977
Publication Date 13.01.2022
International Application No. PCT/IB2021/000513
International Filing Date 08.07.2021
IPC
H01L 21/335 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
H01L 29/78 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
78with field effect produced by an insulated gate
Applicants
  • TEXAS INSTRUMENTS INCORPORATED [US]/[US]
Inventors
  • CHUANG, Ming-Yeh
Agents
  • GRAHAM, Brian
  • GARNER, Jacqueline
Priority Data
16/920,90306.07.2020US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) FIN FIELD EFFECT TRANSISTOR WITH FIELD PLATING
(FR) TRANSISTOR À EFFET DE CHAMP À AILETTE AVEC PLACAGE DE CHAMP
Abstract
(EN) An integrated circuit (IC) having a fin field effect transistor (FinFET) includes a substrate (202) with a fin (204) extending from a surface of the substrate (202). The fin (204) includes a source region (408), a drain region (406), a drift region (402), and field plating oxide layer (602). The drift region (402) is adjacent the drain region (406). The field plating oxide layer (602) is on a first side, a second side, and a third side of the drift region (402).
(FR) L'invention concerne un circuit intégré (CI) comportant un transistor à effet de champ à ailette (FinFET) comprenant un substrat (202) doté d'une ailette (204) s'étendant à partir d'une surface du substrat (202). L'ailette (204) comprend une région de source (408), une région de drain (406), une région de dérive (402) et une couche d'oxyde de placage de champ (602). La région de dérive (402) est adjacente à la région de drain (406). La couche d'oxyde de placage de champ (602) est située sur un premier côté, sur un deuxième côté et sur un troisième côté de la région de dérive (402).
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