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1. WO2022005831 - CIRCUIT TECHNIQUES FOR ENHANCED ELECTROSTATIC DISCHARGE (ESD) ROBUSTNESS

Publication Number WO/2022/005831
Publication Date 06.01.2022
International Application No. PCT/US2021/038620
International Filing Date 23.06.2021
IPC
H01L 27/02 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
H02H 9/04 2006.1
HELECTRICITY
02GENERATION, CONVERSION, OR DISTRIBUTION OF ELECTRIC POWER
HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
9Emergency protective circuit arrangements for limiting excess current or voltage without disconnection
04responsive to excess voltage
H03K 19/003 2006.1
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
KPULSE TECHNIQUE
19Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
003Modifications for increasing the reliability
Applicants
  • QUALCOMM INCORPORATED [US]/[US]
Inventors
  • DUNDIGAL, Sreeker
  • JALILIZEINALI, Reza
  • CHILLARA, Krishna Chaitanya
  • CHEN, Wen-Yi
Agents
  • WORLEY, Eugene
Priority Data
17/355,01622.06.2021US
63/046,31130.06.2020US
Publication Language English (en)
Filing Language English (EN)
Designated States
Title
(EN) CIRCUIT TECHNIQUES FOR ENHANCED ELECTROSTATIC DISCHARGE (ESD) ROBUSTNESS
(FR) TECHNIQUES DE CIRCUIT PERMETTANT UNE ROBUSTESSE AMÉLIORÉE À LA DÉCHARGE ÉLECTROSTATIQUE (ESD)
Abstract
(EN) Exemplary electrostatic discharge (ESD) circuit schemes are provided according to various aspects of the present disclosure. In certain aspects, a current path is created during an ESD event that causes current to flow through a resistor coupled to a protected transistor (e.g., a driver transistor). The current through the resistor creates a voltage drop across the resistor, which reduces the voltage seen by the protected transistor. In certain aspects, the current path is provided by an ESD circuit coupled to a node between the resistor and the transistor. In certain aspects, the current path is created by turning on the transistor during the ESD event with a trigger device.
(FR) L'invention concerne selon divers aspects des schémas de circuit de décharge électrostatique (ESD) donnés à titre d'exemple. Dans certains aspects, un trajet de courant est créé pendant un événement ESD qui amène le courant à circuler à travers une résistance couplée à un transistor protégé (par exemple, un transistor d'attaque). Le courant traversant la résistance crée une chute de tension au niveau de la résistance, ce qui réduit la tension vue par le transistor protégé. Dans certains aspects, le trajet de courant est fourni par un circuit de décharge électrostatique couplé à un nœud entre la résistance et le transistor. Dans certains aspects, le trajet de courant est créé par la mise en marche du transistor pendant l'événement ESD à l'aide d'un dispositif de déclenchement.
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