Processing

Please wait...

Settings

Settings

Goto Application

1. WO2022002261 - CONDUCTIVE LAYER FORMING METHOD, CONDUCTIVE STRUCTURE, AND METHOD FOR FORMING SAME

Publication Number WO/2022/002261
Publication Date 06.01.2022
International Application No. PCT/CN2021/104305
International Filing Date 02.07.2021
IPC
H01L 21/60 2006.1
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the groups H01L21/06-H01L21/326162
60Attaching leads or other conductive members, to be used for carrying current to or from the device in operation
CPC
H01L 21/48
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
H01L 21/4853
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
4814Conductive parts
4846Leads on or in insulating or insulated substrates, e.g. metallisation
4853Connection or disconnection of other leads to or from a metallisation, e.g. pins, wires, bumps
H01L 21/50
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, ; e.g. sealing of a cap to a base of a container
H01L 2224/115
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
11Manufacturing methods
115by chemical or physical modification of a pre-existing or pre-deposited material
H01L 2224/1302
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
10Bump connectors; Manufacturing methods related thereto
12Structure, shape, material or disposition of the bump connectors prior to the connecting process
13of an individual bump connector
13001Core members of the bump connector
1302Disposition
H01L 23/498
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; ; Selection of materials therefor
488consisting of soldered ; or bonded; constructions
498Leads, ; i.e. metallisations or lead-frames; on insulating substrates, ; e.g. chip carriers
Applicants
  • 长鑫存储技术有限公司 CHANGXIN MEMORY TECHNOLOGIES, INC. [CN]/[CN]
Inventors
  • 谢明灯 HSIEH, Ming-teng
Agents
  • 上海晨皓知识产权代理事务所(普通合伙) SHANGHAI CHENHAO INTELLECTUAL PROPERTY LAW FIRM GENERAL PARTNERSHIP
Priority Data
202010633735.302.07.2020CN
Publication Language Chinese (zh)
Filing Language Chinese (ZH)
Designated States
Title
(EN) CONDUCTIVE LAYER FORMING METHOD, CONDUCTIVE STRUCTURE, AND METHOD FOR FORMING SAME
(FR) PROCÉDÉ DE FORMATION DE COUCHE CONDUCTRICE, STRUCTURE CONDUCTRICE ET SON PROCÉDÉ DE FORMATION
(ZH) 导电层的形成方法、导电结构及其形成方法
Abstract
(EN) Provided in embodiments of the present application are a conductive layer forming method, a conductive structure, and a method for forming same. The conductive layer forming method comprises: providing a first conductive film and a solution which has a conductive material; coating the solution onto the surface of the first conductive film, wherein prior to coating, the temperature of the first conductive film is lower than the evaporation temperature or sublimation temperature of the solution; during the coating process step or after coating is performed, heating the first conductive film, so that the temperature of the first conductive film is higher than or equal to the evaporation temperature or sublimation temperature of the solution to form a second conductive film that covers the surface of the first conductive film, the second conductive film comprising a conductive material.
(FR) La présente invention concerne, selon certains modes de réalisation, un procédé de formation de couche conductrice, une structure conductrice et son procédé de formation. Le procédé de formation de couche conductrice comprend : la fourniture d'un premier film conducteur et d'une solution qui contient un matériau conducteur ; le revêtement de la solution sur la surface du premier film conducteur, avant le revêtement, la température du premier film conducteur étant inférieure à la température d'évaporation ou à la température de sublimation de la solution ; pendant l'étape de traitement de revêtement ou après que le revêtement a été appliqué, le chauffage du premier film conducteur, de sorte que la température du premier film conducteur est supérieure ou égale à la température d'évaporation ou à la température de sublimation de la solution pour former un second film conducteur qui recouvre la surface du premier film conducteur, le second film conducteur comprenant un matériau conducteur.
(ZH) 本申请实施例提供一种导电层的形成方法、导电结构及其形成方法,导电层的形成方法包括:提供第一导电膜和具有导电材料的溶液;将溶液涂覆于第一导电膜表面上,且在进行涂覆之前,第一导电膜的温度低于溶液的蒸发温度或升华温度;在进行涂覆的工艺步骤中或者在进行涂覆之后,加热第一导电膜,以使第一导电膜的温度高于或等于溶液的蒸发温度或升华温度,形成覆盖第一导电膜表面的第二导电膜,第二导电膜包括导电材料。
Related patent documents
Latest bibliographic data on file with the International Bureau