Processing

Please wait...

Settings

Settings

Goto Application

1. WO2021057221 - METHOD AND APPARATUS FOR REALIZING STATE UPDATE BASED ON FPGA

Publication Number WO/2021/057221
Publication Date 01.04.2021
International Application No. PCT/CN2020/103589
International Filing Date 22.07.2020
IPC
G06F 21/53 2013.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
52during program execution, e.g. stack integrity, buffer overflow or preventing unwanted data erasure
53by executing in a restricted environment, e.g. sandbox or secure virtual machine
CPC
G06F 15/781
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
781On-chip cache; Off-chip memory
G06F 16/27
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
16Information retrieval; Database structures therefor; File system structures therefor
20of structured data, e.g. relational data
27Replication, distribution or synchronisation of data between databases or within a distributed database system; Distributed database system architectures therefor
G06F 21/53
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
50Monitoring users, programs or devices to maintain the integrity of platforms, e.g. of processors, firmware or operating systems
52during program execution, e.g. stack integrity ; ; Preventing unwanted data erasure; Buffer overflow
53by executing in a restricted environment, e.g. sandbox or secure virtual machine
G06F 21/602
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
602Providing cryptographic facilities or services
G06F 21/6245
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
62Protecting access to data via a platform, e.g. using keys or access control rules
6218to a system of files or objects, e.g. local or distributed file system or database
6245Protecting personal data, e.g. for financial or medical purposes
G06F 21/71
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
70Protecting specific internal or peripheral components, in which the protection of a component leads to protection of the entire computer
71to assure secure computing or processing of information
Applicants
  • 支付宝(杭州)信息技术有限公司 ALIPAY (HANGZHOU) INFORMATION TECHNOLOGY CO., LTD. [CN]/[CN]
Inventors
  • 潘国振 PAN, Guozhen
  • 魏长征 WEI, Changzheng
  • 闫莺 YAN, Ying
Agents
  • 北京博思佳知识产权代理有限公司 BEIJING BESTIPR INTELLECTUAL PROPERTY LAW CORPORATION
Priority Data
201910913487.525.09.2019CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) METHOD AND APPARATUS FOR REALIZING STATE UPDATE BASED ON FPGA
(FR) PROCÉDÉ ET APPAREIL POUR RÉALISER UNE MISE À JOUR D'ÉTAT SUR LA BASE D'UN FPGA
(ZH) 基于FPGA实现状态更新的方法及装置
Abstract
(EN)
One or more embodiments of the present invention provide a method and apparatus for realizing state update based on an FPGA. The method comprises: an FPGA structure loads a deployed circuit logic configuration file to an FPGA chip contained therein, so that an on-chip processor used for achieving virtual machine logic is formed on the FPGA chip; the FPGA structure reads a code program of an intelligent contract and a contract state related to the code program into the on-chip processor, so that the on-chip processor runs the code program to update the value of the contract state, the intelligent contract being related to a transaction received by a blockchain node to which the FPGA structure belongs; and the FPGA structure caches the updated value of the contract state in a local space to further synchronize the updated value of the contract state from the local space to the blockchain node.
(FR)
Un ou plusieurs modes de réalisation de la présente invention concernent un procédé et un appareil pour réaliser une mise à jour d'état sur la base d'un FPGA. Le procédé comprend les étapes suivantes : une structure FPGA charge un fichier de configuration logique de circuit déployé dans une puce FPGA contenue dans celle-ci, de telle sorte qu'un processeur sur puce utilisé pour réaliser une logique de machine virtuelle soit formé sur la puce FPGA ; la structure FPGA lit un programme de code d'un contrat intelligent et un état de contrat associé au programme de code dans le processeur sur puce, de sorte que le processeur sur puce exécute le programme de code pour mettre à jour la valeur de l'état de contrat, le contrat intelligent étant associé à une transaction reçue par un nœud de chaîne de blocs auquel appartient la structure FPGA ; et la structure FPGA met en cache la valeur mise à jour de l'état de contrat dans un espace local pour synchroniser davantage la valeur mise à jour de l'état de contrat, de l'espace local au nœud de chaîne de blocs.
(ZH)
本说明书一个或多个实施例提供一种基于FPGA实现状态更新的方法及装置,该方法可以包括:FPGA结构向自身包含的FPGA芯片加载已部署的电路逻辑配置文件,以在所述FPGA芯片上形成用于实现虚拟机逻辑的片上处理器;所述FPGA结构将智能合约的代码程序和所述代码程序涉及到的合约状态读入所述片上处理器,使所述片上处理器运行所述代码程序以更新所述合约状态的取值,所述智能合约与所述FPGA结构所属的区块链节点接收到的交易相关;所述FPGA结构将所述合约状态的更新后取值缓存于本地空间,以进一步从所述本地空间同步至所述区块链节点。
Also published as
Latest bibliographic data on file with the International Bureau