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1. WO2021056753 - ARRAY SUBSTRATE, PREPARATION METHOD THEREFOR AND DISPLAY DEVICE

Publication Number WO/2021/056753
Publication Date 01.04.2021
International Application No. PCT/CN2019/118432
International Filing Date 14.11.2019
IPC
H01L 27/12 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
H01L 21/77 2017.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
CPC
H01L 27/1222
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1222with a particular composition, shape or crystalline structure of the active layer
H01L 27/1225
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1222with a particular composition, shape or crystalline structure of the active layer
1225with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
H01L 27/1259
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1259Multistep manufacturing methods
H01L 27/127
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
12the substrate being other than a semiconductor body, e.g. an insulating body
1214comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
1259Multistep manufacturing methods
127with a particular formation, treatment or patterning of the active layer specially adapted to the circuit arrangement
Applicants
  • 武汉华星光电技术有限公司 WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. [CN]/[CN]
Inventors
  • 肖军城 XIAO, Juncheng
  • 许勇 XU, Yong
  • 艾飞 AI, Fei
  • 尹国恒 YIN, Guoheng
Agents
  • 深圳紫藤知识产权代理有限公司 PURPLEVINE INTELLECTUAL PROPERTY (SHENZHEN) CO., LTD
Priority Data
201910912144.725.09.2019CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) ARRAY SUBSTRATE, PREPARATION METHOD THEREFOR AND DISPLAY DEVICE
(FR) SUBSTRAT DE RÉSEAU, SON PROCÉDÉ DE PRÉPARATION ET DISPOSITIF D'AFFICHAGE
(ZH) 阵列基板及其制备方法、显示装置
Abstract
(EN)
Provided in the present invention are an array substrate, a preparation method therefor, and a display device. The array substrate comprises a first active layer and a second active layer. The material used in the first active layer is a low-temperature polysilicon, and the material used in the second active layer is an oxide semiconductor. The first active layer and the second active layer are arranged having the layers staggered and offset from each other.
(FR)
La présente invention concerne un substrat de réseau, son procédé de préparation et un dispositif d'affichage. Le substrat de réseau comprend une première couche active et une seconde couche active. Le matériau utilisé dans la première couche active est un polysilicium basse température, et le matériau utilisé dans la seconde couche active est un semi-conducteur à oxyde. La première couche active et la seconde couche actives sont agencées de sorte que les couches soient disposées en quinconce et décalées les unes par rapport aux autres.
(ZH)
本发明提供了一种阵列基板及其制备方法、显示装置。所述阵列基板中包括第一有源层和第二有源层,所述第一有源层所用材料为低温多晶硅,所述第二有源层所用材料为氧化物半导体,所述第一有源层和所述第二有源层相互错层错位设置。
Also published as
Latest bibliographic data on file with the International Bureau