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1. WO2021030059 - COORDINATED ERROR CORRECTION

Publication Number WO/2021/030059
Publication Date 18.02.2021
International Application No. PCT/US2020/044034
International Filing Date 29.07.2020
IPC
G06F 11/10 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
08Error detection or correction by redundancy in data representation, e.g. by using checking codes
10Adding special bits or symbols to the coded information, e.g. parity check, casting out nines or elevens
G06F 9/30 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
G11C 29/52 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
29Checking stores for correct operation; Testing stores during standby or offline operation
52Protection of memory contents; Detection of errors in memory contents
G11C 11/409 2006.01
GPHYSICS
11INFORMATION STORAGE
CSTATIC STORES
11Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
21using electric elements
34using semiconductor devices
40using transistors
401forming cells needing refreshing or charge regeneration, i.e. dynamic cells
4063Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
407for memory cells of the field-effect type
409Read-write circuits
CPC
G06F 11/1076
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
08Error detection or correction by redundancy in data representation, e.g. by using checking codes
10Adding special bits or symbols to the coded information, e.g. parity check, casting out 9's or 11's
1076Parity data used in redundant arrays of independent storages, e.g. in RAID systems
H03M 13/2906
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
13Coding, decoding or code conversion, for error detection or error correction; Coding theory basic assumptions; Coding bounds; Error probability evaluation methods; Channel models; Simulation or testing of codes
29combining two or more codes or code structures, e.g. product codes, generalised product codes, concatenated codes, inner and outer codes
2906using block codes
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • SCHAEFER, Scott, E.
  • BOEHM, Aaron, P.
Agents
  • HARRIS, Philip
Priority Data
16/940,78328.07.2020US
62/885,92513.08.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) COORDINATED ERROR CORRECTION
(FR) CORRECTION D'ERREUR COORDONNÉE
Abstract
(EN)
Methods, systems, and devices for coordinated error correction are described. A memory device may indicate, for example to an external device, that errors were detected in data that was stored by the memory device and requested by the external device based on a comparison between an error correction code stored when the data was written to a memory array and an error correction code generated when the data is read from the memory array. After performing the comparison, an indication of or based on whether the compared error correction codes match may be provided to the external device. The external device may use the indication to detect errors in the received version of the data, or to manage data storage in the memory device, or both, among other operations.
(FR)
L’invention concerne des procédés, des systèmes et des dispositifs pour la correction d'erreur coordonnée. Un dispositif de mémoire peut indiquer, par exemple à un dispositif externe, que des erreurs ont été détectées dans des données qui ont été stockées par le dispositif de mémoire et demandées par le dispositif externe sur la base d'une comparaison entre un code de correction d'erreur stocké lorsque les données ont été écrites dans un réseau de mémoire et un code de correction d'erreur généré lorsque les données sont lues à partir du réseau de mémoire. Après la réalisation de la comparaison, une indication de la correspondance des codes de correction d'erreurs comparés ou une indication basée sur cette correspondance peut être fournie au dispositif externe. Le dispositif externe peut utiliser l'indication pour détecter des erreurs dans la version reçue des données, ou pour gérer le stockage de données dans le dispositif de mémoire, ou les deux, entre autres opérations.
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