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1. WO2021027242 - GAN-BASED MIS-HEMT DEVICE HAVING Г-SHAPED GATE AND PREPARATION METHOD

Publication Number WO/2021/027242
Publication Date 18.02.2021
International Application No. PCT/CN2019/130993
International Filing Date 31.12.2019
IPC
H01L 29/45 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
43characterised by the materials of which they are formed
45Ohmic electrodes
H01L 29/49 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
43characterised by the materials of which they are formed
49Metal-insulator semiconductor electrodes
H01L 21/335 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
334Multistep processes for the manufacture of devices of the unipolar type
335Field-effect transistors
H01L 29/778 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
778with two-dimensional charge carrier gas channel, e.g. HEMT
CPC
H01L 29/452
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
43characterised by the materials of which they are formed
45Ohmic electrodes
452on AIII-BV compounds
H01L 29/4966
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
43characterised by the materials of which they are formed
49Metal-insulator-semiconductor electrodes, ; e.g. gates of MOSFET
4966the conductor material next to the insulator being a composite material, e.g. organic material, TiN, MoSi2
H01L 29/66462
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66446with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
66462with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
H01L 29/7786
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
778with two-dimensional charge carrier gas channel, e.g. HEMT ; ; with two-dimensional charge-carrier layer formed at a heterojunction interface
7786with direct single heterostructure, i.e. with wide bandgap layer formed on top of active layer, e.g. direct single heterostructure MIS-like HEMT
Applicants
  • 中山市华南理工大学现代产业技术研究院 ZHONGSHAN INSTITUTE OF MODERN INDUSTRIAL [CN]/[CN]
  • 华南理工大学 SOUTH CHINA UNIVERSITY OF TECHNOLOGY [CN]/[CN]
Inventors
  • 王洪 WANG, Hong
  • 陈竟雄 CHEN, Jingxiong
  • 刘晓艺 LIU, Xiaoyi
Agents
  • 广州粤高专利商标代理有限公司 YOGO PATENT & TRADEMARK AGENCY LIMITED COMPANY
Priority Data
201910746035.213.08.2019CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) GAN-BASED MIS-HEMT DEVICE HAVING Г-SHAPED GATE AND PREPARATION METHOD
(FR) DISPOSITIF MIS-HEMT À BASE DE GAN COMPORTANT UNE GRILLE EN FORME DE Г, ET PROCÉDÉ DE PRÉPARATION
(ZH) 具有Г型栅的 GaN 基 MIS-HEMT 器件及制备方法
Abstract
(EN)
A GaN-based MIS-HEMT device having a Г-shaped gate and preparation method therefor. The device comprises a structure such as an AlGaN/GaN heterojunction epitaxial layer (1). The device further comprises a Г-shaped gate electrode (6). The Г-shaped gate electrode (6) comprises a gate cap and a gate foot. One end of the gate foot is connected to a part of the lower surface of the gate cap, and the other end thereof is connected to an upper surface of a gate dielectric layer (4) partially exposed at a second opening. The remaining lower surface of the gate cap is connected to an upper surface of a passivation layer (5). By combining G-line or I-line photolithography, comprising contact photolithography and stepping photolithography, with a metal lift-off process or metal lithography process, a part of the gate (6) is made to contact the gate dielectric layer (4), and the other part thereof is made to contact the passivation layer (5) by means of alignment at an opening of the passivation layer (5), such that the linewidth of the gate (6) is greatly reduced under the extreme linewidth of photolithography. A field plate is introduced to the Г-shaped gate structure (6). The field plate modulates the electric field strength distribution of a conductive trench on the side of the gate (6) close to a drain (3), thereby improving a breakdown voltage of a device.
(FR)
L'invention concerne un dispositif MIS-HEMT à base de GaN comportant une grille en forme de Г et son procédé de préparation. Le dispositif comprend une structure telle qu'une couche épitaxiale d'hétérojonction AlGaN/GaN (1). Le dispositif comprend en outre une électrode de grille en forme de Г (6). L'électrode de grille en forme de Г (6) comprend un chapeau de grille et un pied de grille. Une extrémité du pied de grille est reliée à une partie de la surface inférieure du chapeau de grille, et l'autre extrémité de celui-ci est reliée à une surface supérieure d'une couche diélectrique de grille (4) partiellement exposée au niveau d'une deuxième ouverture. La surface inférieure restante du chapeau de grille est reliée à une surface supérieure d'une couche de passivation (5). En combinant une photolithographie en ligne en G ou en ligne en I, comprenant une photolithographie par contact et une photolithographie pas à pas, avec un procédé de décollement de métal ou un procédé de lithographie métallique, une partie de la grille (6) est mise en contact avec la couche diélectrique de grille (4), et l'autre partie de celle-ci est mise en contact avec la couche de passivation (5) par alignement au niveau d'une ouverture de la couche de passivation (5), de telle sorte que la largeur de trait de la grille (6) est fortement réduite sous la largeur de trait extrême de la photolithographie. Une plaque de champ est introduite dans la structure de grille en forme de Г (6). La plaque de champ module la distribution d'intensité de champ électrique d'une tranchée conductrice du côté de la grille (6) à proximité d'un drain (3), ce qui permet d'améliorer une tension de claquage d'un dispositif.
(ZH)
一种具有Γ型栅的GaN基MIS-HEMT器件及其制备方法,所述器件包括AlGaN/GaN异质结外延层(1)等结构,所述器件还包括一Γ型栅电极(6),所述Γ型栅电极(6)包括栅帽和栅脚,栅脚的一端和栅帽的部分下表面连接,另一端和第二开口处部分暴露的栅介质层(4)上表面连接,栅帽的其余下表面和钝化层(5)上表面连接。利用G线、I线光刻包括接触式光刻和步进式光刻与金属剥离工艺或金属刻蚀工艺结合,通过在钝化层(5)开口处通过对准的方式,使一部分的栅极(6)与栅介质层(4)接触,另一部分与钝化层(5)接触,使栅极(6)线宽在光刻的极限线宽下大大减小;所述Γ栅结构(6),引入了场板,场板调制了栅(6)靠漏(3)侧导电沟道的电场强度分布,提高了器件的击穿电压。
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