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1. WO2020242908 - RATIOMETRIC GAIN ERROR CALIBRATION SCHEMES FOR DELTA-SIGMA ADCS WITH CAPACITIVE GAIN INPUT STAGES

Publication Number WO/2020/242908
Publication Date 03.12.2020
International Application No. PCT/US2020/034131
International Filing Date 22.05.2020
IPC
H03M 3/02 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
3Conversion of analogue values to or from differential modulation
02Delta modulation, i.e. one-bit differential modulation
H03M 3/04 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
3Conversion of analogue values to or from differential modulation
04Differential modulation with several bits
H03M 3/00 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING, DECODING OR CODE CONVERSION, IN GENERAL
3Conversion of analogue values to or from differential modulation
CPC
H03M 1/1014
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
10Calibration or testing
1009Calibration
1014at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
H03M 1/1245
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
12Analogue/digital converters
124Sampling or signal conditioning arrangements specially adapted for A/D converters
1245Details of sampling arrangements or methods
H03M 1/462
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
12Analogue/digital converters
34Analogue value compared with reference values
38sequentially only, e.g. successive approximation type
46with digital/analogue converter for supplying reference values to converter
462Details of the control circuitry, e.g. of the successive approximation register
H03M 1/466
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
1Analogue/digital conversion; Digital/analogue conversion
12Analogue/digital converters
34Analogue value compared with reference values
38sequentially only, e.g. successive approximation type
46with digital/analogue converter for supplying reference values to converter
466using switched capacitors
H03M 3/378
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
3Conversion of analogue values to or from differential modulation
30Delta-sigma modulation
378Testing
H03M 3/382
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
MCODING; DECODING; CODE CONVERSION IN GENERAL
3Conversion of analogue values to or from differential modulation
30Delta-sigma modulation
38Calibration
382at one point of the transfer characteristic, i.e. by adjusting a single reference value, e.g. bias or gain error
Applicants
  • MICROCHIP TECHNOLOGY INCORPORATED [US]/[US]
Inventors
  • QUIQUEMPOIX, Vincent
  • TURK, Zeynep Sueda
Agents
  • SLAYDEN, Bruce W., II
Priority Data
16/879,91721.05.2020US
62/852,54424.05.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) RATIOMETRIC GAIN ERROR CALIBRATION SCHEMES FOR DELTA-SIGMA ADCS WITH CAPACITIVE GAIN INPUT STAGES
(FR) SCHÉMAS D'ÉTALONNAGE D'ERREUR DE GAIN QUOTIENTOMÉTRIQUE POUR CAN DELTA-SIGMA À ÉTAGES D'ENTRÉE DE GAIN CAPACITIFS
Abstract
(EN)
An analog to digital converter (ADC) circuit includes voltage and reference input terminals, a sample circuit, and control logic. The sample circuit includes input and output terminals, and capacitors connected in parallel and arranged between the input and output terminals. The control logic is configured to, in a calibration phase of operation, cause the multiplexer to route the ADC reference input terminal to the sampling voltage input terminal, determine a given gain value, determine a set of the capacitors to be used to achieve the given gain value, successively enable capacitor subsets to sample voltage of the reference input while disabling a remainder of the capacitors until all capacitors have been enabled, determine a resulting output code, and from the output code, determine a gain error of the given gain value of the ADC circuit.
(FR)
La présente invention concerne un circuit convertisseur analogique-numérique (CAN) qui comprend des bornes d'entrée de tension et de référence, un circuit d'échantillonnage et une logique de commande. Le circuit d'échantillonnage comprend des bornes d'entrée et de sortie, et des condensateurs connectés en parallèle et agencés entre les bornes d'entrée et de sortie. La logique de commande est configurée pour, dans une phase de fonctionnement d'étalonnage, amener le multiplexeur à acheminer la borne d'entrée de référence CAN vers la borne d'entrée de tension d'échantillonnage, déterminer une valeur de gain donnée, déterminer un ensemble des condensateurs à utiliser pour obtenir la valeur de gain donnée, activer successivement des sous-ensembles de condensateurs pour échantillonner la tension de l'entrée de référence tout en désactivant un reste des condensateurs jusqu'à ce que tous les condensateurs aient été activés, déterminer un code de sortie résultant, et à partir du code de sortie, déterminer une erreur de gain de la valeur de gain donnée du circuit CAN.
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