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1. WO2020242683 - MEMORY MANAGEMENT UNIT (MMU) FOR ACCESSING BORROWED MEMORY

Publication Number WO/2020/242683
Publication Date 03.12.2020
International Application No. PCT/US2020/029755
International Filing Date 24.04.2020
IPC
G06F 12/06 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
06Addressing a physical block of locations, e.g. base addressing, module addressing, address space extension, memory dedication
G06F 12/0813 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0806Multiuser, multiprocessor or multiprocessing cache systems
0813with a network or matrix configuration
G06F 12/0831 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0806Multiuser, multiprocessor or multiprocessing cache systems
0815Cache consistency protocols
0831using a bus scheme, e.g. with bus monitoring or watching means
G06F 12/0875 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0875with dedicated cache, e.g. instruction or stack
G06F 12/0882 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0877Cache access modes
0882Page mode
G06F 12/1027 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1027using associative or pseudo-associative address translation means, e.g. translation look-aside buffer
CPC
G06F 12/1027
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1027using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
G06F 2212/657
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
65Details of virtual memory and virtual address translation
657Virtual address space management
G06F 2212/68
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
68Details of translation look-aside buffer [TLB]
H04L 67/1097
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
67Network-specific arrangements or communication protocols supporting networked applications
10in which an application is distributed across nodes in the network
1097for distributed storage of data in a network, e.g. network file system [NFS], transport mechanisms for storage area networks [SAN] or network attached storage [NAS]
H04W 84/042
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
WWIRELESS COMMUNICATION NETWORKS
84Network topologies
02Hierarchically pre-organised networks, e.g. paging networks, cellular networks, WLAN [Wireless Local Area Network] or WLL [Wireless Local Loop]
04Large scale networks; Deep hierarchical networks
042Public Land Mobile systems, e.g. cellular systems
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • BRADSHAW, Samuel E.
  • AKEL, Ameen D.
  • CUREWITZ, Kenneth Marion
  • EILERT, Sean Stephen
  • YUDANOV, Dmitri
Agents
  • WARD, John P.
  • WANG, Lehua
Priority Data
16/424,42028.05.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) MEMORY MANAGEMENT UNIT (MMU) FOR ACCESSING BORROWED MEMORY
(FR) UNITÉ DE GESTION DE MÉMOIRE (MMU) PERMETTANT D'ACCÉDER À UNE MÉMOIRE EMPRUNTÉE
Abstract
(EN)
Systems, methods and apparatuses to accelerate accessing of borrowed memory over network connection are described. For example, a memory management unit (MMU) of a computing device can be configured to be connected both to the random access memory over a memory bus and to a computer network via a communication device. The computing device can borrow an amount of memory from a remote device over a network connection using the communication device; and applications running in the computing device can use virtual memory addresses mapped to the borrowed memory. When a virtual address mapped to the borrowed memory is used, the MMU translates the virtual address into a physical address and instruct the communication device to access the borrowed memory.
(FR)
L'invention concerne des systèmes, des procédés et des appareils pour accélérer l'accès d'une mémoire empruntée sur une connexion réseau. Par exemple, une unité de gestion de mémoire (MMU) d'un dispositif informatique peut être configurée pour être connectée à la fois à la mémoire vive sur un bus de mémoire et à un réseau informatique par l'intermédiaire d'un dispositif de communication. Le dispositif informatique peut emprunter une quantité de mémoire à partir d'un dispositif distant sur une connexion réseau à l'aide du dispositif de communication ; et des applications exécutées dans le dispositif informatique peuvent utiliser des adresses de mémoire virtuelle mappées sur la mémoire empruntée. Lorsqu'une adresse virtuelle mappée sur la mémoire empruntée est utilisée, la MMU traduit l'adresse virtuelle en une adresse physique et ordonne au dispositif de communication d'accéder à la mémoire empruntée.
Also published as
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