WO2020220268 THREE-DIMENSIONAL MEMORY DEVICE HAVING BENT BACKSIDE WORD LINES

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Publication Number WO/2020/220268

Publication Date 05.11.2020

International Application No. PCT/CN2019/085210

International Filing Date 30.04.2019

IPC

CPC

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Applicants

YANGTZE MEMORY TECHNOLOGIES CO., LTD. [CN]/[CN]

Inventors

XIAO, Li Hong

Agents

NTD UNIVATION INTELLECTUAL PROPERTY AGENCY LTD.

Priority Data

Publication Language English (en)

Filing Language English (EN)

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Title

(EN) THREE-DIMENSIONAL MEMORY DEVICE HAVING BENT BACKSIDE WORD LINES

(FR) DISPOSITIF DE MÉMOIRE TRIDIMENSIONNEL AYANT DES LIGNES DE MOTS ARRIÈRE COURBÉES

Abstract

(EN) A three-dimensional (3D) memory device having bent backside word lines is disclosed. The 3D memory device includes a substrate (102), a semiconductor layer (104) above and extending laterally beyond at least one edge (114, 116) of the substrate (102), a plurality of interleaved conductive layers (110) and dielectric layers (112) above a front side of the semiconductor layer (104) and extending below a back side of the semiconductor layer (104), and a plurality of memory strings (130, 140) each extending vertically through the interleaved conductive layers (110) and dielectric layers (112) and in contact with the semiconductor layer (104).

(FR) L'invention concerne un dispositif de mémoire tridimensionnel (3D) ayant des lignes de mots arrière courbées. Le dispositif de mémoire 3D comprend un substrat (102), une couche semi-conductrice (104) au-dessus et s'étendant latéralement au-delà d'au moins un bord (114, 116) du substrat (102), une pluralité de couches conductrices entrelacées (110) et des couches diélectriques (112) au-dessus d'un côté avant de la couche semi-conductrice (104) et s'étendant au-dessous d'un côté arrière de la couche semi-conductrice (104), et une pluralité de chaînes de mémoire (130, 140) s'étendant chacune verticalement à travers les couches conductrices entrelacées (110) et les couches diélectriques (112) et en contact avec la couche semi-conductrice (104).

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27	Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02	including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04	the substrate being a semiconductor body
10	including a plurality of individual components in a repetitive configuration
105	including field-effect components
112	Read-only memory structures
115	Electrically programmable read-only memories; Multistep manufacturing processes therefor
11563	with charge-trapping gate insulators, e.g. MNOS or NROM
11578	characterised by three-dimensional arrangements, e.g. with cells on different height levels
1158	with source and drain on different levels, e.g. with sloping channels
11582	the channels comprising vertical portions, e.g. U-shaped channels

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27	Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02	including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04	the substrate being a semiconductor body
10	including a plurality of individual components in a repetitive configuration
105	including field-effect components
112	Read-only memory structures
115	Electrically programmable read-only memories; Multistep manufacturing processes therefor
11563	with charge-trapping gate insulators, e.g. MNOS or NROM
11578	characterised by three-dimensional arrangements, e.g. with cells on different height levels
1158	with source and drain on different levels, e.g. with sloping channels
11582	the channels comprising vertical portions, e.g. U-shaped channels

G	PHYSICS
11	INFORMATION STORAGE
C	STATIC STORES
8	Arrangements for selecting an address in a digital store
14	Word line organisation; Word line lay-out

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27	Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02	including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04	the substrate being a semiconductor body
06	including a plurality of individual components in a non-repetitive configuration
0688	Integrated circuits having a three-dimensional layout
0694	comprising components formed on opposite sides of a semiconductor substrate

H	ELECTRICITY
01	BASIC ELECTRIC ELEMENTS
L	SEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27	Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02	including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04	the substrate being a semiconductor body
10	including a plurality of individual components in a repetitive configuration
105	including field-effect components
112	Read-only memory structures ; [ROM] and multistep manufacturing processes therefor
115	Electrically programmable read-only memories; Multistep manufacturing processes therefor
11517	with floating gate
11521	characterised by the memory core region
11524	with cell select transistors, e.g. NAND

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1. WO2020220268 - THREE-DIMENSIONAL MEMORY DEVICE HAVING BENT BACKSIDE WORD LINES