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1. WO2020203814 - BIAS CIRCUIT AND CURRENT OUTPUT CIRCUIT

Publication Number WO/2020/203814
Publication Date 08.10.2020
International Application No. PCT/JP2020/014127
International Filing Date 27.03.2020
IPC
G05F 3/26 2006.01
GPHYSICS
05CONTROLLING; REGULATING
FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
3Non-retroactive systems for regulating electric variables by using an uncontrolled element, or an uncontrolled combination of elements, such element or such combination having self-regulating properties
02Regulating voltage or current
08wherein the variable is dc
10using uncontrolled devices with non-linear characteristics
16being semiconductor devices
20using diode-transistor combinations
26Current mirrors
H03F 1/22 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
1Details of amplifiers with only discharge tubes, only semiconductor devices or only unspecified devices as amplifying elements
08Modifications of amplifiers to reduce detrimental influences of internal impedances of amplifying elements
22by use of cascode coupling, i.e. earthed cathode or emitter stage followed by earthed grid or base stage respectively
H03F 3/345 2006.01
HELECTRICITY
03BASIC ELECTRONIC CIRCUITRY
FAMPLIFIERS
3Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
34Dc amplifiers in which all stages are dc-coupled
343with semiconductor devices only
345with field-effect devices
Applicants
  • 株式会社村田製作所 MURATA MANUFACTURING CO., LTD. [JP]/[JP]
Inventors
  • 大奈路 勉 Oonaro, Tsutomu
Agents
  • 特許業務法人酒井国際特許事務所 SAKAI INTERNATIONAL PATENT OFFICE
Priority Data
2019-06700229.03.2019JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) BIAS CIRCUIT AND CURRENT OUTPUT CIRCUIT
(FR) CIRCUIT DE POLARISATION ET CIRCUIT DE SORTIE DE COURANT
(JA) バイアス回路及び電流出力回路
Abstract
(EN)
A bias circuit for outputting a first potential to the gate of a load-side transistor among two cascade-connected transistors during normal operation of a constant-current circuit, wherein a potential lower than the first potential is output to the gate of the load-side transistor when the gate potential of the load-side transistor is higher than the first potential, and a potential higher than the first potential is output to the gate of the load-side transistor when the gate potential of the load-side transistor is lower than the first potential.
(FR)
La présente invention porte sur un circuit de polarisation destiné à fournir un premier potentiel à la grille d'un transistor côté charge parmi deux transistors connectés en cascade pendant le fonctionnement normal d'un circuit à courant constant, un potentiel inférieur au premier potentiel étant fourni à la grille du transistor côté charge quand le potentiel de grille du transistor côté charge est supérieur au premier potentiel, et un potentiel supérieur au premier potentiel étant fourni à la grille du transistor côté charge quand le potentiel de grille du transistor côté charge est inférieur au premier potentiel.
(JA)
バイアス回路は、定電流回路の定常動作時に、第1電位を、カスコード接続された2個のトランジスタの内の負荷側のトランジスタのゲートに出力し、負荷側のトランジスタのゲートの電位が第1電位よりも高くなった場合には、第1電位よりも低い電位を、負荷側のトランジスタのゲートに出力し、負荷側のトランジスタのゲートの電位が第1電位よりも低くなった場合には、第1電位よりも高い電位を、負荷側のトランジスタのゲートに出力する。
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