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1. WO2020203507 - MONOLITHIC SEMICONDUCTOR DEVICE AND HYBRID SEMICONDUCTOR DEVICE

Publication Number WO/2020/203507
Publication Date 08.10.2020
International Application No. PCT/JP2020/013168
International Filing Date 24.03.2020
IPC
H01L 27/06 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
02including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
04the substrate being a semiconductor body
06including a plurality of individual components in a non-repetitive configuration
H01L 21/8232 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
78with subsequent division of the substrate into plural individual devices
82to produce devices, e.g. integrated circuits, each consisting of a plurality of components
822the substrate being a semiconductor, using silicon technology
8232Field-effect technology
Applicants
  • パナソニックセミコンダクターソリューションズ株式会社 PANASONIC SEMICONDUCTOR SOLUTIONS CO., LTD. [JP]/[JP]
Inventors
  • 本吉 要 MOTOYOSHI, Kaname
  • 上谷 昌稔 KAMITANI, Masatoshi
Agents
  • 新居 広守 NII, Hiromori
  • 寺谷 英作 TERATANI, Eisaku
  • 道坂 伸一 MICHISAKA, Shinichi
Priority Data
62/827,62201.04.2019US
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) MONOLITHIC SEMICONDUCTOR DEVICE AND HYBRID SEMICONDUCTOR DEVICE
(FR) DISPOSITIF À SEMI-CONDUCTEUR MONOLITHIQUE ET DISPOSITIF À SEMI-CONDUCTEUR HYBRIDE
(JA) モノリシック半導体装置およびハイブリッド半導体装置
Abstract
(EN)
This monolithic semiconductor device has: a substrate (11); a first nitride semiconductor layer (102) formed on the substrate (11); a second nitride semiconductor layer (103) formed on the first nitride semiconductor layer (102) and having a bandgap larger than that of the first nitride semiconductor layer (102); an HEMT-type first transistor (12) for power amplification which is formed on the substrate (11) and includes the first nitride semiconductor layer (102) and the second nitride semiconductor layer (103); and a first bias circuit (20) which includes an HEMT-type second transistor (21) formed on the substrate (11) and disposed outside a propagation path of a high frequency signal input to the first transistor (12), and which applies a bias voltage to a gate of the first transistor (12).
(FR)
La présente invention concerne un dispositif à semi-conducteur monolithique comprenant : un substrat ; une première couche semi-conductrice au nitrure (102) formée sur le substrat ; une seconde couche semi-conductrice au nitrure (103) formée sur la première couche semi-conductrice au nitrure (102) et ayant une bande interdite plus grande que celle de la première couche semi-conductrice au nitrure (102) ; un premier transistor de type HEMT (12) pour une amplification d'énergie qui est formé sur le substrat (11) et comprend la première couche semi-conductrice au nitrure (102) et la seconde couche semi-conductrice au nitrure (103) ; et un premier circuit de polarisation (20) qui comprend un second transistor de type HEMT (21) formé sur le substrat (11) et disposé à l'extérieur d'un trajet de propagation d'un signal haute fréquence entré dans le premier transistor (12), et qui applique une tension de polarisation à une grille du premier transistor (12).
(JA)
モノリシック半導体装置は、基板(11)と、基板(11)上に形成された第1窒化物半導体層(102)と、第1窒化物半導体層(102)の上に形成され、第1窒化物半導体層(102)と比べてバンドギャップが大きい第2窒化物半導体層(103)と、基板(11)上に形成され、第1窒化物半導体層(102)および第2窒化物半導体層(103)からなるHEMT型の電力増幅用の第1トランジスタ(12)と、基板(11)上に形成され、第1トランジスタ(12)に入力される高周波信号の伝搬経路外に配置されたHEMT型の第2トランジスタ(21)を含み、第1トランジスタ(12)のゲートにバイアス電圧を与える第1バイアス回路(20)とを有する。
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