Processing

Please wait...

Settings

Settings

Goto Application

1. WO2020197971 - PROCESSOR, DEVICE, AND METHOD FOR EXECUTING INSTRUCTIONS

Publication Number WO/2020/197971
Publication Date 01.10.2020
International Application No. PCT/US2020/023774
International Filing Date 20.03.2020
IPC
G06F 9/38 2018.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
G06F 12/00 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
G06F 9/35 2018.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
34Addressing or accessing the instruction operand or the result
35Indirect addressing
G06F 9/24 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
22Microcontrol or microprogram arrangements
24Loading of the microprogram
CPC
G06F 9/30043
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
3004to perform operations on memory
30043LOAD or STORE instructions; Clear instruction
G06F 9/3838
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
3836Instruction issuing, e.g. dynamic instruction scheduling, out of order instruction execution
3838Dependency mechanisms, e.g. register scoreboarding
Applicants
  • ALIBABA GROUP HOLDING LIMITED
Inventors
  • LU, Yimin
  • XIANG, Xiaoyan
Agents
  • CAPRON, Aaron J.
Priority Data
201910238787.827.03.2019CN
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) PROCESSOR, DEVICE, AND METHOD FOR EXECUTING INSTRUCTIONS
(FR) PROCESSEUR, DISPOSITIF ET PROCÉDÉ POUR EXÉCUTER DES INSTRUCTIONS
Abstract
(EN)
The present disclosure discloses an instruction execution device, a processor including the instruction execution device, a system on chip, and a method for executing a data storage instruction in the processor. The method includes: splitting the data storage instruction into a first split instruction and a second split instruction, wherein the first split instruction is associated with an address operand of the data storage instruction, and the second split instruction is associated with a data operand of the data storage instruction; executing the first split instruction to determine a data storage address corresponding to the address operand; executing the second split instruction to acquire data content corresponding to the data operand; and storing the acquired data content to the determined data storage address in a data storage region. The present disclosure further discloses a corresponding instruction execution device, a processor including the execution device and a system on chip.
(FR)
La présente invention concerne un dispositif d'exécution d'instructions, un processeur qui comprend le dispositif d'exécution d'instructions, un système sur puce, et un procédé pour exécuter une instruction de stockage de données dans le processeur. Le procédé comprend : la division de l'instruction de stockage de données en une première instruction divisée et une seconde instruction divisée, la première instruction divisée étant associée à un opérande d'adresse de l'instruction de stockage de données, et la seconde instruction divisée étant associée à un opérande de données de l'instruction de stockage de données ; l'exécution de la première instruction de division pour déterminer une adresse de stockage de données qui correspond à l'opérande d'adresse ; l'exécution de la seconde instruction de division pour acquérir un contenu de données qui correspond à l'opérande de données ; et le stockage du contenu de données acquis à l'adresse de stockage de données déterminée dans une région de stockage de données. La présente invention concerne en outre un dispositif d'exécution d'instructions correspondant, un processeur qui comprend le dispositif d'exécution et un système sur puce.
Latest bibliographic data on file with the International Bureau