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1. WO2020197916 - SYSTEMS AND METHODS FOR PROVIDING LOW MEMORY KILLER PROTECTION TO NON-SYSTEM APPLICATIONS

Publication Number WO/2020/197916
Publication Date 01.10.2020
International Application No. PCT/US2020/023521
International Filing Date 19.03.2020
IPC
G06F 9/50 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
50Allocation of resources, e.g. of the central processing unit
G06F 9/54 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
54Interprogram communication
G06F 9/48 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
48Program initiating; Program switching, e.g. by interrupt
CPC
G06F 11/073
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
11Error detection; Error correction; Monitoring
07Responding to the occurrence of a fault, e.g. fault tolerance
0703Error or fault processing not based on redundancy, i.e. by taking additional measures to deal with the error or fault not making use of redundancy in operation, in hardware, or in data representation
0706the processing taking place on a specific hardware platform or in a specific software environment
073in a memory management context, e.g. virtual memory or cache management
G06F 12/0804
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
0802Addressing of a memory level in which the access to the desired data or data block requires associative addressing means, e.g. caches
0804with main memory updating
G06F 2212/304
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
30Providing cache or TLB in specific location of a processing system
304In main memory subsystem
G06F 2212/60
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
2212Indexing scheme relating to accessing, addressing or allocation within memory systems or architectures
60Details of cache memory
G06F 8/20
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
8Arrangements for software engineering
20Software design
G06F 9/542
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
54Interprogram communication
542Event management; Broadcasting; Multicasting; Notifications
Applicants
  • VERIFONE, INC. [US]/[US]
Inventors
  • GALICIA, Joshua David
  • VERSINO, Nicholas James
  • GREMO, Christopher Scott
  • FERGUSON, Robert
Agents
  • KING, Robert A.
Priority Data
16/362,29222.03.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEMS AND METHODS FOR PROVIDING LOW MEMORY KILLER PROTECTION TO NON-SYSTEM APPLICATIONS
(FR) SYSTÈMES ET PROCÉDÉS POUR FOURNIR UNE PROTECTION CONTRE LOW MEMORY KILLER À DES APPLICATIONS NON-SYSTÈME
Abstract
(EN)
Systems and methods for low memory killer protection are disclosed. According to one embodiment, in an information processing apparatus comprising at least one computer processor and executing an operating system including a LMK subsystem, a method for providing low memory killer (LMK) protection may include: (1) a non-system application embedded with a SDK initiating a foreground service at the beginning of a use case session; (2) the non-system application causing the foreground service to create an ongoing notification with the operating system, wherein the ongoing notification causes the non-system application to have no lower than a perceptible LMK status during the use case session; (3) the non-system application completing the use case session; and (4) the non-system application causing the foreground service to remove the ongoing notification.
(FR)
La présente invention concerne des systèmes et des procédés de protection contre low memory killer. Selon un mode de réalisation, dans un appareil de traitement d'informations comprenant au moins un processeur informatique et exécutant un système d'exploitation comprenant un sous-système LMK, un procédé pour fournir une protection contre low memory killer (LMK) peut comprendre les étapes suivantes : (1) une application non-système dans laquelle est intégré un SDK lance un service de premier plan au début d'une session de scénario d'utilisation ; (2) l'application non-système amène le service de premier plan à créer une notification « en cours » avec le système d'exploitation, la notification « en cours » amenant l'application non-système à ne pas avoir moins d'un état LMK perceptible pendant la session de scénario d'utilisation ; (3) l'application non-système achève la session de scénario d'utilisation ; et (4) l'application non-système amène le service de premier plan à supprimer la notification « en cours ».
Also published as
Latest bibliographic data on file with the International Bureau