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1. WO2020197725 - SYSTEM, APPARATUS AND METHOD FOR ADAPTIVE INTERCONNECT ROUTING

Publication Number WO/2020/197725
Publication Date 01.10.2020
International Application No. PCT/US2020/020927
International Filing Date 04.03.2020
IPC
G06F 13/12 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
10Program control for peripheral devices
12using hardware independent of the central processor, e.g. channel or peripheral processor
G06F 1/26 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/-G06F13/82
26Power supply means, e.g. regulation thereof
G06F 15/78 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general; Data processing equipment in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
CPC
G06F 1/3243
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
3243Power saving in microcontroller unit
G06F 1/3296
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
1Details not covered by groups G06F3/00G06F13/00 and G06F21/00
26Power supply means, e.g. regulation thereof
32Means for saving power
3203Power management, i.e. event-based initiation of power-saving mode
3234Power saving characterised by the action undertaken
3296by lowering the supply or operating voltage
G06F 15/7817
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
15Digital computers in general
76Architectures of general purpose stored program computers
78comprising a single central processing unit
7807System on chip, i.e. computer system on a single chip; System in package, i.e. computer system on one or more chips in a single package
7817Specially adapted for signal processing, e.g. Harvard architectures
G06F 9/30079
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
30003Arrangements for executing specific machine instructions
30076to perform miscellaneous control operations, e.g. NOP
30079Pipeline control instructions
G06F 9/546
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
54Interprogram communication
546Message passing systems or structures, e.g. queues
Applicants
  • INTEL CORPORATION [US]/[US]
Inventors
  • SINGH, Tejpal
  • HILEWITZ, Yedidya
  • VARMA, Ankush
  • LIU, Yen-Cheng
  • SISTLA, Krishnakanth V.
  • CHAMBERLAIN, Jeffrey
Agents
  • ROZMAN, Mark J.
  • GARZA, John C.
  • PRUNER JR., Fred G.
  • RICHARDS, Edwin E.
  • BARRE, Michael R.
Priority Data
16/364,61926.03.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) SYSTEM, APPARATUS AND METHOD FOR ADAPTIVE INTERCONNECT ROUTING
(FR) SYSTÈME, APPAREIL ET PROCÉDÉ DE ROUTAGE D'INTERCONNEXION ADAPTATIF
Abstract
(EN)
In one embodiment, an apparatus includes an interconnect to couple a plurality of processing circuits. The interconnect may include a pipe stage circuit coupled between a first processing circuit and a second processing circuit. This pipe stage circuit may include: a pipe stage component having a first input to receive a signal via the interconnect and a first output to output the signal; and a selection circuit having a first input to receive the signal from the first output of the pipe stage component and a second input to receive the signal via a bypass path, where the selection circuit is dynamically controllable to output the signal received from the first output of the pipe stage component or the signal received via the bypass path. Other embodiments are described and claimed.
(FR)
Dans un mode de réalisation, l'invention concerne un appareil qui comprend une interconnexion pour coupler une pluralité de circuits de traitement. L'interconnexion peut comprendre un circuit d'étage de tuyau couplé entre un premier circuit de traitement et un second circuit de traitement. Ce circuit d'étage de tuyau peut comprendre : un composant d'étage de tuyau ayant une première entrée destinée à recevoir un signal par l'intermédiaire de l'interconnexion et une première sortie destinée à délivrer en sortie le signal ; et un circuit de sélection ayant une première entrée destinée à recevoir le signal à partir de la première sortie du composant d'étage de tuyau et une seconde entrée destinée à recevoir le signal par l'intermédiaire d'un trajet de dérivation, le circuit de sélection pouvant être commandé de manière dynamique pour délivrer le signal reçu à partir de la première sortie du composant d'étage de tuyau ou du signal reçu par l'intermédiaire du trajet de dérivation. L'invention concerne et revendique également d'autres modes de réalisation.
Also published as
Latest bibliographic data on file with the International Bureau