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1. WO2020197339 - METHOD FOR PROCESSING NETWORK PACKETS AND ELECTRONIC DEVICE THEREFOR

Publication Number WO/2020/197339
Publication Date 01.10.2020
International Application No. PCT/KR2020/004261
International Filing Date 27.03.2020
IPC
G06F 9/50 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
46Multiprogramming arrangements
50Allocation of resources, e.g. of the central processing unit
G06F 9/38 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
9Arrangements for program control, e.g. control units
06using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
30Arrangements for executing machine instructions, e.g. instruction decode
38Concurrent instruction execution, e.g. pipeline, look ahead
H04L 12/861 2013.01
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
12Data switching networks
70Packet switching systems
801Flow control or congestion control
861Packet buffering or queuing arrangements; Queue scheduling
CPC
H04L 47/193
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
19at layers above network layer
193at transport layer, e.g. TCP related
H04L 47/29
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
29Using a combination of thresholds
H04L 47/30
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
47Traffic regulation in packet switching networks
10Flow control or congestion control
30using information about buffer occupancy at either end or transit nodes
H04L 49/9005
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
49Packet switching elements
90Queuing arrangements
9005Dynamic buffer space allocation
H04L 49/9057
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
49Packet switching elements
90Queuing arrangements
9057Arrangements for supporting packet reassembly or resequencing
H04L 49/9094
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
49Packet switching elements
90Queuing arrangements
9094Arrangements for simultaneous transmit and receive, e.g. simultaneous reading/writing from/to the storage element
Applicants
  • SAMSUNG ELECTRONICS CO., LTD. [KR]/[KR]
Inventors
  • KANG, Youngwook
  • LEE, Wonbo
  • HONG, Youngki
Agents
  • BAE, KIM & LEE IP
Priority Data
10-2019-003541827.03.2019KR
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) METHOD FOR PROCESSING NETWORK PACKETS AND ELECTRONIC DEVICE THEREFOR
(FR) PROCÉDÉ DE TRAITEMENT DE PAQUETS DE RÉSEAU ET DISPOSITIF ÉLECTRONIQUE ASSOCIÉ
Abstract
(EN)
An electronic device including a wireless communication circuitry, a processor including a plurality of cores, and a memory. The processor receives a packet of a first session associated with a first core among the plurality of cores, identifies whether a core associated with the first session is changed to a second core different from the first core, sets pending information based on an amount of packets which are pending in a first packet of the first core when it is identified that the core is changed to the second core, stores data corresponding to the received packet of the first session in a pending buffer of the memory, and inserts the data corresponding to the received packet of the first session, stored in the pending buffer, into a packet queue of the second core.
(FR)
L'invention concerne un dispositif électronique comprenant un circuit de communication sans fil, un processeur comprenant une pluralité de cœurs, et une mémoire. Le processeur reçoit un paquet d'une première session associée à un premier cœur de la pluralité de cœurs, identifie si un cœur associé à la première session est modifié en un second cœur différent du premier cœur, définit des informations en attente d’après une quantité de paquets qui sont en attente dans un premier paquet du premier cœur lorsqu'il est identifié que le cœur est modifié en un second cœur, stocke les données correspondant au paquet reçu de la première session dans un tampon en attente de la mémoire, puis insère les données correspondant au paquet reçu de la première session, stockées dans le tampon en attente, dans une file d'attente de paquet du second cœur.
Latest bibliographic data on file with the International Bureau