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1. WO2020196162 - COMPOSITION FOR POLISHING SEMICONDUCTOR WIRING

Publication Number WO/2020/196162
Publication Date 01.10.2020
International Application No. PCT/JP2020/011996
International Filing Date 18.03.2020
IPC
B24B 37/00 2012.01
BPERFORMING OPERATIONS; TRANSPORTING
24GRINDING; POLISHING
BMACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
37Lapping machines or devices; Accessories
H01L 21/304 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
304Mechanical treatment, e.g. grinding, polishing, cutting
Applicants
  • 株式会社ダイセル DAICEL CORPORATION [JP]/[JP]
Inventors
  • 坂西裕一 SAKANISHI, Yuichi
Agents
  • 特許業務法人後藤特許事務所 GOTO & CO.
Priority Data
2019-05453122.03.2019JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) COMPOSITION FOR POLISHING SEMICONDUCTOR WIRING
(FR) COMPOSITION POUR LE POLISSAGE DE CÂBLAGE DE SEMI-CONDUCTEUR
(JA) 半導体配線研磨用組成物
Abstract
(EN)
The present invention provides a composition for polishing semiconductor wiring, the composition having exceptional polishing speed and being such that the occurrence of dishing is suppressed. This composition for polishing semiconductor wiring includes a compound represented by formula (1). Formula (1): R1O-(C3H6O2)n-H (In the formula, R1 represents a hydrogen atom, a C1-24 hydrocarbon group that optionally has a hydroxyl group, or R2CO, and R2 represents a C1-24 hydrocarbon group. n represents the average degree of polymerization of glycerol units indicated in parentheses, and is 2-60.)
(FR)
La présente invention concerne une composition pour le polissage de câblage de semi-conducteur, la composition ayant une vitesse de polissage exceptionnelle et étant telle que l'apparition de bombage est supprimée. Cette composition de polissage de câblage semi-conducteur comprend un composé représenté par la formule (1). Formule (1) : R1O-(C3H6O2)n-H (dans la formule, R1 représente un atome d'hydrogène, un groupe hydrocarboné en C1-24 qui comprend éventuellement un groupe hydroxyle, ou R2CO, et R2 représente un groupe hydrocarboné en C1-24, n représente le degré moyen de polymérisation des motifs glycérol indiquées entre parenthèses, et est situé dans la plage allant de 2 à 60.)
(JA)
研磨速度に優れるとともに、ディッシングの発生が抑制された半導体配線研磨用組成物を提供する。 本発明の半導体配線研磨用組成物は、下記式(1)で表される化合物を含む。 R1O-(C362n-H (1) (式中、R1は、水素原子、ヒドロキシル基を有していてもよい炭素数1~24の炭化水素基、又はR2COで表される基を示し、前記R2は炭素数1~24の炭化水素基を示す。nは括弧内に示されるグリセリン単位の平均重合度を示し、2~60である)
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