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1. WO2020195808 - SEMICONDUCTOR DEVICE PRODUCTION METHOD AND LAMINATED BODY

Publication Number WO/2020/195808
Publication Date 01.10.2020
International Application No. PCT/JP2020/010413
International Filing Date 11.03.2020
IPC
B23K 26/53 2014.01
BPERFORMING OPERATIONS; TRANSPORTING
23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
26Working by laser beam, e.g. welding, cutting or boring
50Working by transmitting the laser beam through or within the workpiece
53for modifying or reforming the material inside the workpiece, e.g. for producing break initiation cracks
H01L 21/304 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
302to change the physical characteristics of their surfaces, or to change their shape, e.g. etching, polishing, cutting
304Mechanical treatment, e.g. grinding, polishing, cutting
H01L 21/683 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components
683for supporting or gripping
H01L 21/301 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer, carrier concentration layer
18the devices having semiconductor bodies comprising elements of group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20-H01L21/26142
301to subdivide a semiconductor body into separate parts, e.g. making partitions
Applicants
  • リンテック株式会社 LINTEC CORPORATION [JP]/[JP]
Inventors
  • 文田 祐介 FUMITA, Yusuke
  • 田久 真也 TAKYU, Shinya
  • 愛澤 和人 AIZAWA, Kazuto
  • 長谷川 裕也 HASEGAWA, Yuya
Agents
  • 特許業務法人大谷特許事務所 OHTANI PATENT OFFICE
Priority Data
2019-05859126.03.2019JP
Publication Language Japanese (JA)
Filing Language Japanese (JA)
Designated States
Title
(EN) SEMICONDUCTOR DEVICE PRODUCTION METHOD AND LAMINATED BODY
(FR) PROCÉDÉ DE PRODUCTION DE DISPOSITIF À SEMI-CONDUCTEUR ET CORPS STRATIFIÉ
(JA) 半導体装置の製造方法及び積層体
Abstract
(EN)
Provided is a semiconductor device production method with which it is unlikely to cause cracks or defects to a chip being manufactured even in the case when the distance between adjacent diced chips is small. This method is for producing a semiconductor device having a rectangular planar shape, and involves: pasting, on a surface of a wafer including a plurality of rectangular to-be-diced regions arranged in a matrix configuration, an adhesive sheet along a short-side direction of the to-be-diced regions; grinding the rear surface of the wafer having the adhesive sheet pasted thereon; and dividing chips along planned division lines that define the to-be-diced regions.
(FR)
Cette invention concerne un procédé de production de dispositifs à semi-conducteur avec lequel il est peu probable de provoquer des fissures ou des défauts sur une puce en train d'être fabriquée, même dans le cas où la distance entre des puces découpées adjacentes est petite. Ce procédé est destiné à produire un dispositif à semi-conducteur ayant une forme plane rectangulaire, et consiste à : coller, sur une surface d'une tranche comprenant une pluralité de régions rectangulaires à découper agencées selon une configuration de matrice, une feuille adhésive le long d'une direction côté court des régions à découper ; poncer la surface arrière de la tranche ayant la feuille adhésive collée sur celle-ci ; et séparer les puces le long de lignes de séparation planifiées qui définissent les régions à découper.
(JA)
隣接する個片化後のチップ間の距離が小さい場合でも、製造工程中にチップに割れや欠けが生じにくい半導体装置の製造方法を提供する。 平面形状が矩形状の半導体装置の製造方法であって、マトリクス状に並んでいる複数の矩形状の個片化予定領域を含むウエハの表面に、前記個片化予定領域の短辺方向に沿って粘着シートを貼付し、前記粘着シートが貼付されたウエハの裏面を研削するととともに、前記個片化予定領域を画定する分割予定線に沿って前記チップを分割する、半導体装置の製造方法である。
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