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1. WO2020195089 - ELECTRICALLY POWER ASSEMBLY WITH THICK ELECTRICALLY CONDUCTIVE LAYERS

Publication Number WO/2020/195089
Publication Date 01.10.2020
International Application No. PCT/JP2020/002641
International Filing Date 20.01.2020
IPC
H01L 23/538 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
H05K 1/18 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
18Printed circuits structurally associated with non-printed electric components
H05K 3/46 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
3Apparatus or processes for manufacturing printed circuits
46Manufacturing multi-layer circuits
H01L 25/07 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
25Assemblies consisting of a plurality of individual semiconductor or other solid state devices
03all the devices being of a type provided for in the same subgroup of groups H01L27/-H01L51/128
04the devices not having separate containers
07the devices being of a type provided for in group H01L29/78
H05K 1/02 2006.01
HELECTRICITY
05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
1Printed circuits
02Details
CPC
H01L 2224/04105
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
04105Bonding areas formed on an encapsulation of the semiconductor or solid-state body, e.g. bonding areas on chip-scale packages
H01L 2224/06181
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
02Bonding areas; Manufacturing methods related thereto
04Structure, shape, material or disposition of the bonding areas prior to the connecting process
06of a plurality of bonding areas
061Disposition
0618being disposed on at least two different sides of the body, e.g. dual array
06181On opposite sides of the body
H01L 2224/2518
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
2224Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
18High density interconnect [HDI] connectors; Manufacturing methods related thereto
23Structure, shape, material or disposition of the high density interconnect connectors after the connecting process
25of a plurality of high density interconnect connectors
251Disposition
2518being disposed on at least two different sides of the body, e.g. dual array
H01L 23/5383
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
5383Multilayer substrates
H01L 23/5384
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
5384Conductive vias through the substrate with or without pins, e.g. buried coaxial conductors
H01L 23/5389
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
23Details of semiconductor or other solid state devices
52Arrangements for conducting electric current within the device in operation from one component to another ; , i.e. interconnections, e.g. wires, lead frames
538the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
5389the chips being integrally enclosed by the interconnect and support structures
Applicants
  • MITSUBISHI ELECTRIC CORPORATION [JP]/[JP] (AE, AG, AL, AM, AO, AT, AU, AZ, BA, BB, BE, BF, BG, BH, BJ, BN, BR, BW, BY, BZ, CA, CF, CG, CH, CI, CL, CM, CN, CO, CR, CU, CY, CZ, DE, DJ, DK, DM, DO, DZ, EC, EE, EG, ES, FI, FR, GA, GB, GD, GE, GH, GM, GN, GQ, GR, GT, GW, HN, HR, HU, ID, IE, IL, IN, IR, IS, IT, JO, KE, KG, KH, KM, KN, KP, KR, KW, KZ, LA, LC, LK, LR, LS, LT, LU, LV, LY, MA, MC, MD, ME, MG, MK, ML, MN, MR, MT, MW, MX, MY, MZ, NA, NE, NG, NI, NL, NO, NZ, OM, PA, PE, PG, PH, PL, PT, QA, RO, RS, RU, RW, SA, SC, SD, SE, SG, SI, SK, SL, SM, SN, ST, SV, SY, SZ, TD, TG, TH, TJ, TM, TN, TR, TT, TZ, UA, UG, US, UZ, VC, VN, WS, ZA, ZM, ZW)
  • MITSUBISHI ELECTRIC R&D CENTRE EUROPE B.V. [NL]/[NL] (JP)
Inventors
  • MRAD, Roberto
  • MOLLOV, Stefan
Agents
  • SOGA, Michiharu
  • KAJINAMI, Jun
  • UEDA, Shunichi
Priority Data
19164827.825.03.2019EP
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) ELECTRICALLY POWER ASSEMBLY WITH THICK ELECTRICALLY CONDUCTIVE LAYERS
(FR) ENSEMBLE D'ALIMENTATION ÉLECTRIQUE À COUCHES ÉLECTRIQUEMENT CONDUCTRICES ÉPAISSES
Abstract
(EN)
An electrical power assembly, comprising: at least one multilayer base structure, at least one power device embedded in the at least one multilayer base structure, an internal electrically conductive layer positioned on each side of the multilayer base structure, the internal electrically conductive layer being connected to a respective electrical contact of the power device through connections arranged in the multilayer base structure; at least one external electrically conductive layers positioned on each side of the base structure, each external electrically conductive layer comprising at least one pre-drilled through hole, at least one internal electrically insulating layer positioned between the internal electrically conductive layer of the base structure and a respective external electrically conductive layer, at least one hole arranged in the internal electrically insulating layer and the external electrically conductive layer, a portion of each hole being formed by the pre-drilled through hole, the at least one hole being filled with electrically conductive material to form external conductive vias to connect the internal electrically conductive layer to the respective external electrically conductive layer.
(FR)
L'invention concerne un ensemble d'alimentation électrique, comprenant : au moins une structure de base multicouche, au moins un dispositif d'alimentation intégré dans l'au moins une structure de base multicouche, une couche électriquement conductrice interne positionnée de chaque côté de la structure de base multicouche, la couche électriquement conductrice interne étant connectée à un contact électrique respectif du dispositif d'alimentation par l'intermédiaire de connexions disposées dans la structure de base multicouche; au moins une couche électriquement conductrice externe positionnée de chaque côté de la structure de base, chaque couche électriquement conductrice externe comprenant au moins un trou traversant pré-percé, au moins une couche électriquement isolante interne positionnée entre la couche électriquement conductrice interne de la structure de base et une couche électriquement conductrice externe respective, au moins un trou agencé dans la couche électriquement isolante interne et la couche électriquement conductrice externe, une partie de chaque trou étant formée par le trou traversant pré-percé, l'au moins un trou étant rempli d'un matériau électriquement conducteur pour former des trous d'interconnexion conducteurs externes pour connecter la couche électriquement conductrice interne à la couche électriquement conductrice externe respective.
Also published as
Latest bibliographic data on file with the International Bureau