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1. WO2020192925 - APPARATUS FOR CORE SPECIFIC MEMORY MAPPING

Publication Number WO/2020/192925
Publication Date 01.10.2020
International Application No. PCT/EP2019/057879
International Filing Date 28.03.2019
IPC
G06F 12/1009 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1009using page tables, e.g. page table structures
G06F 12/1027 2016.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1027using associative or pseudo-associative address translation means, e.g. translation look-aside buffer
CPC
G06F 12/1009
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1009using page tables, e.g. page table structures
G06F 12/1027
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
12Accessing, addressing or allocating within memory systems or architectures
02Addressing or allocation; Relocation
08in hierarchically structured memory systems, e.g. virtual memory systems
10Address translation
1027using associative or pseudo-associative address translation means, e.g. translation look-aside buffer [TLB]
Applicants
  • HUAWEI TECHNOLOGIES CO., LTD. [CN]/[CN]
  • STOPPA, Igor [IT]/[SE] (US)
Inventors
  • STOPPA, Igor
Agents
  • KREUZ, Georg
Priority Data
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) APPARATUS FOR CORE SPECIFIC MEMORY MAPPING
(FR) APPAREIL DE CARTOGRAPHIE DE MÉMOIRE SPÉCIFIQUE À UN CŒUR
Abstract
(EN)
An apparatus that includes a plurality of cores and a plurality of per core mapping tables. Each per core mapping table in the plurality of per core mapping tables includes one or more mapping entries. Each per core mapping table is configured to generate a physical memory address based on a virtual memory address and the one or more mapping entries. Each per core mapping table is configured to allow one corresponding core in the plurality of cores to generate the physical memory address based on the one or more mapping entries, and to prevent all remaining cores in the plurality of cores from generating the physical memory address based on the one or more mapping entries.
(FR)
L'invention concerne un appareil qui comprend une pluralité de cœurs et une pluralité de tables de mappage par cœur. Chaque table de mappage par cœur dans la pluralité de tables de mappage par cœur comprend une ou plusieurs entrées de mappage. Chaque table de mappage par cœur est configurée pour générer une adresse de mémoire physique sur la base d'une adresse de mémoire virtuelle et de la ou des entrées de mappage. Chaque table de mappage par cœur est configurée pour permettre à un cœur correspondant dans la pluralité de cœurs de générer l'adresse de mémoire physique sur la base de la ou des entrées de mappage, et pour empêcher tous les cœurs restants dans la pluralité de cœurs de générer l'adresse de mémoire physique sur la base de la ou des entrées de mappage.
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