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1. WO2020192569 - SCHOTTKY-TYPE HETEROJUNCTION STRUCTURE, METHOD OF MAKING THE SAME AND SCHOTTKY BARRIER DIODE DEVICE INCLUDING THE SAME

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Title of Invention 0001   0002   0003   0004   0005   0006   0007   0008   0009   0010   0011   0012   0013   0014   0015   0016   0017   0018   0019   0020   0021   0022   0023   0024   0025   0026   0027   0028   0029   0030   0031   0032   0033   0034   0035   0036   0037   0038   0039   0040   0041   0042   0043   0044   0045   0046   0047   0048   0049   0050   0051   0052   0053   0054   0055   0056   0057   0058   0059   0060   0061   0062   0063   0064   0065   0066   0067   0068  

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Description

Title of Invention : SCHOTTKY-TYPE HETEROJUNCTION STRUCTURE, METHOD OF MAKING THE SAME AND SCHOTTKY BARRIER DIODE DEVICE INCLUDING THE SAME

BACKGROUND OF THE INVENTION

[0001]
1. Field of the Invention
[0002]
The present invention related generally to devices and structures that include a Schottky-type heterojunction comprising a semimetal and a semiconductor layer, more particularly, a rare earth pnictide layer and a group IIIA-VA compound layer.
[0003]
2. Description of the Prior Art
[0004]
Schottky barrier diode is an important component in high speed integrated circuit and microwave technology. The nonlinearity of the Schottky barrier diode can be applied to high-frequency detection and harmonic generation. Based on the thermionic emission theory, the current-voltage relation of an actual Schottky barrier diode can be expressed as
[0005]
[0006]
[0007]
Where I s is the reverse saturation current, k is the Boltzmann constant, T is the temperature, q is the elementary charge, n is the ideal factor, A is the junction area, A * is the effective Richardson constant and Φ B is the Schottky barrier.
[0008]
The Schottky-type junction is the core part of the Schottky barrier diode. Tradition Schottky-type junction comprises a semiconductor layer and a metal layer formed by common metals such as Au, Al, Ni, Pt, Cu. The Schottky barrier diode based on these metals usually has an ideal factor >1.1 and a noise equivalent power of several hundreds of pW/Hz 1/2. The defects such as interdiffusion and reaction can form at the interface between the semiconductor and metal due to the incompatibility between the two-type materials. These defects will induce the nonideality and enhance noise. Therefore, an improved interface quality will improve the property of the Schottky barrier diode.
[0009]
SUMMARY OF THE INVENTION
[0010]
The objective of the invention is to provide a Schottky-type heterojunction structure, a preparing method and a Schottky barrier diode (SBD) device. The interface between the semimetal layer and the semiconductor layer of the Schottky-type heterojunction shows improved quality. The Schottky barrier diode device based on this heterojunction structure has an ideal factor of about 1.05 and its noise equivalent power (NEP) is lower than 1 pW/Hz 1/2.
[0011]
In order to fulfill the above objective, the present invention provides a Schottky-type heterojunction structure comprising a semiconductor layer and a semimetal layer disposed on the semiconductor layer, wherein the semiconductor layer and the semimetal layer contact each other through Schottky contacts, wherein the semimetal layer includes semimetallic materials whose conduction band and valence band are overlapped or close to overlapped.
[0012]
In some embodiments, the Schottky-type heterojunction structure further comprises a protection layer disposed on the semimetal layer. In a preferred embodiment, the material of the protection layer includes Al, Mo, W, Ta, Au, Cu and Pt. In a more preferred embodiment, the material of the protection layer is in single crystalline or poly-crystalline form.
[0013]
In some embodiments, the semimetal layer is a continuous film or a discontinued film. In a preferred embodiment, the thickness of the semimetal layer is less than
[0014]
In some embodiments, the semimetallic materials are rare earth compounds composed of rare earth elements and group-VA elements. In a preferred embodiment, the rare earth elements include Er, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Tm, Yb, Lu, Y and Sc. In another preferred embodiment, the group-VA elements include P, As, Sb and Bi. In a preferred embodiment, the rare earth compounds include ErAs, ErSb, GdAs, GdSb, SmAs, SmSb, HoAs, HoSb, EuAs, EuSb, YbAs, YbSb, LuAs, LuSb, ScAs and ScSb.
[0015]
In some embodiments, the semiconductor layer is an intentionally doped semiconductor layer or unintentionally doped semiconductor layer. In a preferred embodiment, the unintentionally doped semiconductor layer includes compounds composed of group-IIIA elements and group-VA elements, wherein the group-IIIA elements include Al, Ga and In and the group-VA elements include P, As, Sb and Bi. In another preferred embodiment, the intentionally doped semiconductor layer includes compounds composed of group-IIIA elements and group-VA elements, wherein the group-IIIA elements include Al, Ga and In, the group-VA elements include P, As, Sb and Bi, and the dopant elements include Si, Te, Be and C.
[0016]
Another objective of the invention is to provide a method for preparing the Schottky-type heterojunction structure, wherein the Schottky-type heterojunction structure is grown on a substrate using thin film growth techniques.
[0017]
In a preferred embodiment, the thin film growth techniques include molecular beam epitaxy, metal-organic chemical vapor deposition, and pulsed laser deposition.
[0018]
In some embodiments, the method further comprises an interface treatment by hydrogen sources. In a preferred embodiment, the interface treatment includes thermal annealing and hydrogen passivation. In another preferred embodiment, the hydrogen sources are atomic hydrogen sources or hydrogen plasmas.
[0019]
The third objective of the invention is to provide a Schottky barrier diode device, comprising: at least one bottom contact, a substrate, a heavily-doped buffer layer, a semiconductor layer, a semimetal layer, a protection layer, a top contact layer stacked in order, wherein the bottom contacts and the heavily-doped buffer layer contact each other through Ohmic contacts, the protection layer and the semimetal layer contact each other through Ohmic contacts, and the Schottky-type heterojunction structure is formed between the semimetal layer and the semiconductor layer.
[0020]
The Schottky-type heterojunction in this invention uses rare earth compounds instead of traditional metal materials. The semimetal rare earth compounds have better compatibility with semiconductor materials compared to the traditional metal materials. Firstly, the rare earth compounds have similar lattice constants with group IIIA-VA semiconductor and are proved to form high-quality interface with low defect density and improved thermal stability. Secondly, the rare earth compounds have better wettability on the semiconductors than the traditional metals, which provides high-quality semimetal films.
[0021]
The preparation method of the above Schottky-type heterojunction in this invention is thin film growth methods including molecular beam epitaxy, metal-organic chemical vapor deposition, and pulsed laser deposition. The epitaxial methods enable the in-situ epitaxial growth of the semimetal layer on the semiconductor layer under ultrahigh vacuum. This technology lowers the possibility of the interfacial oxide formation, and is easy to operate.

BRIEF DESCRIPTION OF THE DRAWINGS

[0022]
FIG. 1 is a schematic view illustrating the structure of the Schottky-type heterojunction structure according to an embodiment of the present invention.
[0023]
FIG. 2 is a schematic view illustrating the structure of the Schottky-type heterojunction structure according to another embodiment of the present invention.
[0024]
FIG. 3 is a schematic view illustrating the structure of the Schottky barrier diode device according to an embodiment of the present invention.
[0025]
FIG. 4 is an XRD pattern for a specific example of the Schottky-type heterojunction structure according to an embodiment of the present invention.
[0026]
FIG. 5 is a high-resolution transmission electron image showing the interface between ErAs and GaAs according to an embodiment of the present invention.
[0027]
FIG. 6 is a high-resolution transmission electron image showing the layered structure of Al/ErAs/GaAs according to an embodiment of the present invention.

DETAILED DESCRIPTION OF THE INVENTION

[0028]
The purpose of the present invention is to provide a Schottky-type heterojunction structure with high interfacial quality. Another purpose is to provide a Schottky barrier diode (SBD) device with ideal factor close to 1 and low noise equivalent power (NEP) is lower than 1 pW/Hz 1/2. The Schottky-type heterojunction structure comprises a semimetal layer and a semiconductor layer, as shown in FIG. 1. The semimetal layer and the semiconductor layer contact each other through Schottky contacts. The semimetal layer includes semimetallic materials whose conduction band and valence band are overlapped or close to overlapped. Because of the bandgap between the conduction band and the valence band is small enough or close to zero, the Fermi level lies in the conduction band. More free carriers make the materials to show metallic properties.
[0029]
In this invention, the semimetallic materials include rare earth compounds composed of rare earth elements and group-VA elements. In these rare earth compounds, the rare earth elements include Er, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Tm, Yb, Lu, Y and Sc. In some examples, the rare earth elements are preferably chosen as Er, Gd or Sm. The group-VA elements include P, As, Sb and Bi. In some examples, the group-VA elements are preferably chosen as As or Sb. Preferably, the rare earth compounds are chosen as ErAs, ErSb, GdAs, GdSb, SmAs, SmSb, HoAs, HoSb, EuAs, EuSb, YbAs, YbSb, LuAs, LuSb, ScAs or ScSb. More preferably, the rare earch compounds are chosen as ErAs or ErSb. The rare earth compound materials would have different forms with different thicknesses, and a 4 monolayer (ML) , about thickness is believed to form a continuous film.
[0030]
In this invention, the semiconductor layer includes doped semiconductor layer or undoped semiconductor layer. The doped semiconductor layer is intentionally doped, and the undoped semiconductor layer is unintentionally doped. The unintentionally doped semiconductor layer includes group IIIA-VA compound materials formed by group-IIIA elements and group-VA elements. The group-IIIA elements include Al, Ga and In. The group-VA elements include P, As, Sb and Bi. In some examples, the group-VA elements are preferably chosen as As or Sb. Preferably, the group IIIA-VA compound is chosen as AlAs, AlSb, GaAs, GaSb, InAs, InSb, multicomponent compounds formed by at least two of the above-mentioned compounds, or digital alloys formed by at least two of the above-mentioned compounds. Specifically, the chemical formula of the above multicomponent compounds and digital alloys can be written as In 1-x-yGa xAl yAs (0<x<1, 0<y<1, x+y≤1) or Al xGa 1-xSb (0<x<1) . In this invention, the digital alloys refer to the superlattice structure formed by several types of ultrathin semiconductor layers. For example, if atomically thick AlSb layers and GaSb layers are stacked alternately, the whole can be considered as a homogeneous alloy. If the thickness of AlSb layers is a, the thickness of GaSb layers is b, the chemical formula can be written as Al xGa 1-xSb with x=a/ (a+b) .
[0031]
In some examples, the dopant elements in the intentionally doped semiconductor layer is preferably chosen as Si, Te, Be and C. In some examples, the group IIIA-VA compound materials of the doped semiconductor layer is preferably chosen to be the same as that of the undoped semiconductor layer. The doping concentration in the doped semiconductor layer is preferably chosen to be ≤1×10 17 cm -3.
[0032]
In the present invention, the Schottky-type heterojunction structure further comprises a protection layer disposed on the semimetal layer, as shown in FIG. 2. The protection layer is to protect the semimetal layer from oxidation and modulate the Schottky barrier height together with the semimetal layer. In detailed, the protection layer serves two purposes. Firstly, because the semimetal layer tends to oxidize in the air, the protection layer is used to protect the semimetal layer from oxidation, and it is deposited on top of the semimetal layer before the whole structure is taken out of the vacuum for subsequent processing. Secondly, the protection layer is normally a metal layer, which can modulate the Schottky barrier height of the semimetal/semiconductor heterojunctions. The thickness of the semimetal layer is divided into three regimes where the protection layer imposes different effects on the Schottky barrier height. The protection layer can be materials that are well-known to the technicians in this field. In some examples, the protection layer is preferably chosen as Al, Mo, W, Ta, Au, Cu or Pt. The material of the protection layer can be in single-crystalline or poly-crystalline form, and the protection layer in single-crystalline form can eliminate defects both inside the protection layer and at the interface, to further lower the device noise level.
[0033]
In this embodiment, the semimetal layer is a continuous film as the S2 and S3 structures in FIG. 2, or a discontinued film as the S1 structure in FIG. 2. The functionality of the Schottky-type heterojunction structure can be divided into three regimes due to the semimetal layer thickness, where the protection layer imposes different effects on the Schottky barrier height. FIG. 2 shows the structures with different semimetal layer thicknesses: S1, islands formed when the thickness < yielding an embedded discontinued semimetal/semiconductor heterojunction; S2 and S3, continuous films formed when the thickness > For S1, the protection layer will have direct contact with the exposed semiconductor layer and forms its own Schottky contact. Together with the semimetallic islands, the Schottky barrier height would be determined by the two parallel Schottky barriers. For S2, when the thickness is between and there is additional charge transfer between the protection layer and the semimetal layer to induce band bending in the semimetal layer, which could modulate the Fermi level position and the Schottky barrier height. FIG. 2 also provides an example of schematic energy-band diagrams showing the modulation effects of the protection layer. W p is the workfunction of the protection layer, W m the workfunction of the semimetal layer, and χ s is the electron affinity of the semiconductor layer. In this example, W p < W m. The contact of the protection layer with the semimetal layer induces the downshift of the Fermi level and increases the Schottky barrier from φ b to φ′ b. For S3, when the thickness > the band bending in the semimetal layer induced by the protection layer is far from the semimetal/semiconductor interface, so little effects are expected on the Schottky barrier height modulation.
[0034]
This invention also provides a preparation method for the above Schottky-type heterojunction structure. The Schottky-type heterojunction structures indicated in FIG. 1 or FIG. 2 can be grown on a substrate using thin film growth techniques, which include molecular beam epitaxy (MBE) , metal-organic chemical vapor deposition and pulsed laser deposition. In MBE, no sample transfer in and out of the vacuum is needed. The in-situ epitaxial growth under ultrahigh vacuum is favorable to improve the interface quality between the semimetal layer and the semiconductor layer. In this invention, the parameters used in the preparation process can be adjusted by technicians according to actual conditions. Detailed information will be illustrated as follows with some embodiments.
[0035]
The preparing method further comprises an interface treatment. Interface treatment is one step in growing the Schottky-type semimetal/semiconductor heterojunctions structures. The interface treatment includes thermal annealing and hydrogen passivation. The purpose of the interface treatment is to remove excess surface adsorbents, saturate dangling bonds to further modulate the Schottky barrier height. This step can be performed either after the growth or during the growth process. This invention has no limitation on the operating process used for the interface treatment. Specifically, the hydrogen sources including atomic hydrogen sources and hydrogen plasmas are used for the interface treatment, and the hydrogen source is introduced into a vacuum system where the semimetal/semiconductor heterojunction structure is placed and heated. The atomic hydrogen is produced by cracking H 2 (99.99995%) into their atomic forms by a high temperature up to 2000~2200 ℃ while the background pressure is chosen to be 5×10 -5~5×10 -6 torr. The semimetal/semiconductor heterojunction structure is heated to be 50~550 ℃ and the exposure time is 5~10 min up to a few hours.
[0036]
As shown in FIG. 3, the invention provides a Schottky barrier diode (SBD) device including at least one bottom contact, a substrate, a heavily-doped buffer layer, a semiconductor layer, a semimetal layer, a protection layer and a top contact layer stacked in order. The bottom contact is fabricated by traditional lithography technology and form Ohmic contacts with the heavily-doped buffer layer. The protection layer also forms Ohmic contacts with the semimetal layer. The semiconductor layer and the semimetal layer form the Schottky-type heterojunction structure.
[0037]
The SBD device presented in this invention includes a substrate. This invention has no limitation on the choices of the substrate. The substrate can be materials familiar to the technicians in this field. More specifically, in some examples, the substrate is chosen as GaAs or InP. The substrate requires an oxide desorption process prior to the growth. In some examples, the substrate temperature is preferably chosen to be 550~650℃ during the oxide desorption process, and the duration time of the oxide desorption process is preferably chosen to be 10~20 min. An effective oxide desorption herein is favorable to smooth epitaxial growth and to achieve a high-quality Schottky-type heterojunction.
[0038]
The SBD device presented in this invention includes a heavily-doped buffer layer epitaxially grown on the above-mentioned substrate. The heavily-doped buffer layer can form Ohmic contacts with bottom contacts. The bottom contacts are fabricated by traditional lithography technology. In addition, the heavily-doped buffer layer can provide a smooth surface for the subsequent growth and is favorable to a high-quality Schottky-type heterojunction.
[0039]
In some examples, the material of the heavily-doped buffer layer is chosen according to the substrate. Specifically, the material of the heavily-doped buffer layer is preferably chosen to be GaAs when the substrate is GaAs; the material of the heavily-doped buffer layer is preferably chosen to be In 0.53Ga 0.47As or In 0.52Al 0.48As when the substrate is InP. In some examples, the dopant element in the heavily-doped buffer layer is chosen according to the desired carrier type. Specifically, the dopant element is preferably chosen as Si and Te for n-type doping; the dopant element is preferably chosen as Be and C for p-type doping. The doping concentration in the heavily-doped buffer layer is preferably chosen to be ≥1×10 18 cm -3.
[0040]
The SBD device presented in this invention includes a semiconductor layer epitaxially grown on the heavily-doped buffer layer, then a semimetal layer epitaxially grown on the semiconductor layer. The semimetal layer and the semiconductor layer form the Schottky-type heterojunction structure. The details of the semiconductor layer and the semimetal layer are the same as those of the Schottky-type heterojunction structure described above.
[0041]
In some examples, some gradient layers are set between the heavily-doped buffer layer and the semiconductor layer. The gradient layers here refer to the layers with doping concentrations lower than that of the heavily-doped buffer layer but higher than that of the doped semiconductor layer. The gradient layer is to provide a function of doping concentration transition. This invention has no limitation on the choices of the materials and dopant elements of the gradient layers.
[0042]
This invention has no limitation on the choices of the materials of the bottom contacts and the top contacts. The bottom contacts and top contacts can be the materials familiar to the technicians in this field. In some examples, the material of the bottom contacts and the top contacts is preferably chosen as Al, Au, Pt, and Ti/Pt/Au multilayered composite materials.
[0043]
This invention has no limitation on the thickness of each layer in the SBD device. The thickness of each layer can be chosen according to practical conditions. Specifically, in some examples, the thickness of the above heavily-doped buffer layer is preferably chosen to be the thickness of the above gradient layer is preferably chosen to be < the thickness of the above semiconductor layer is preferably chosen to be the thickness of the above semimetal layer is preferably chosen to be less than the thickness of the above protection layer is preferably chosen to be
[0044]
In some examples, the preparation process of the SBD device preferably includes following steps: the heavily-doped buffer layer, the semiconductor layer, the semimetal layer are epitaxially grown on the substrate successively. The protection layer is in-situ deposited on the semimetal layer. The semimetal layer and the semiconductor layer form the above-mentioned Schottky-type heterojunction structure. The protection layer forms Ohmic contact with the semimetal layer. The contact position is determined by standard lithography technology and the etching depth reaches the heavily-doped buffer layer to form mesa structures of the device. The top contact is deposited on the protection layer by standard evaporation method. The bottom contacts are fabricated on the exposed heavily-doped buffer layer, and form Ohmic contacts with the heavily-doped buffer layer. If the gradient layers are included in the device structure, the grading layers are also preferably obtained by MBE.
[0045]
This invention has no limitation on the operating process of the MBE technique used for the preparation of the above SBD device. It can be the process familiar to the technicians in this field. Specifically, in some examples, during the growth of the above-mentioned heavily-doped buffer layer and the gradient layer, the growth temperature is preferably chosen to be 500~600℃, and the background pressure is preferably chosen to be 1×10 -7~1×10 -10 torr, and the growth rate is preferably chosen to be during the growth of the semiconductor layer, the growth temperature is preferably chosen to be 500~600℃, and the background pressure is preferably chosen to be 1×10 -7~1×10 -10 torr, and the growth rate is preferably chosen to be during the growth of the semimetal layer, the growth temperature is preferably chosen to be 400~500℃, and the background pressure is preferably chosen to be 1×10 -7~1×10 -10 torr, and the growth rate is preferably chosen to be during the growth of the above protection layer, the growth temperature is preferably chosen to be <100℃, and the background pressure is preferably chosen to be <5×10 -10 torr, and the growth rate is preferably chosen to be
[0046]
This invention has no limitation on the operating process of the lithography and evaporation technology used for the preparation of the SBD device. It can be the process familiar to the technicians in this field.
[0047]
In this field, the noises of the SBD devices primarily come from the interface between the metal layer and the semiconductor layer. If the interfacial defects induced defect levels are close to the Fermi level, the electrons would be trapped and released alternately and constantly and form the charging and discharging currents when the diode is in operation. Ideally, the SBD works under thermionic emission mode where the ideal factor n=1. The defects at the interface also introduce other forms of current, including tunneling current and recombination current, leading to an n>1 ideal factor. In this invention, the Schottky-type heterojunction structure and the SBD device uses a semimetallic materials instead of the commonly used metal materials, and the choice of material is rare earth compounds. The conduction band and the valence band have overlaps in these rare earth compound materials, and the free carrier density is much larger than that in semiconductors. Therefore the rare earth compounds have metallic properties. Compared to traditional metals (for example, Al and Au) , the rare earth-V compounds (for example, ErAs, ErSb, GdAs, SmSb) have a rocksalt crystal structure, and similar lattice constant to those of the IIIA-VA semiconductors (for example, for ErAs and for GaAs) . The rare earth compounds have higher crystal symmetry than that of the IIIA-VA semiconductors, which is favorable to the epitaxial growth of the rare earth compounds on the IIIA-VA semiconductors. In addition, the rare earth compounds have better wettability on semiconductors. Traditional metals usually have poor wettability on semiconductors due to relatively large difference in surface energy, which leads to poor interfacial quality due to polycrystalline formation and interdiffusion. Therefore, the rare earth compounds are more favorable to form high quality single-crystalline films with high quality interfaces with the semiconductors. The rare earth compounds also have better compatibility in growth conditions with the semiconductors. In this invention, the rare earth compound semimetal layer is epitaxially grown on the semiconductor layer in-situ under ultra high vacuum. In some examples, the growth temperature of the whole heterojunction structure is preferably chosen to be 400~600℃, and the background pressure is preferably chosen to be 1×10 -7~1×10 -10 torr. This all-epitaxial method can avoid oxidation at the interface and is favorable to reduce defects caused by dangling bonds and segregation phases at the interface. Additional interface treatment processes, including thermal annealing and hydrogen passivation using atomic hydrogen can be performed in-situ to further improve the interfacial quality. The non-epitaxial methods used in traditional processing (for example, evaporating and sputtering) can introduce many defects, especially oxides at the interface and lead to a poor quality.
[0048]
In addition, the reduction of interface defect density can improve the tunability of the Schottky barrier height. A lower defect density is favorable to tune the Schottky barrier height by changing the components of the semiconductor layer, the type of the termination layer, and the type and concentration of the dopant elements in the doped semiconductor layer. The termination layer here refers to the upmost atomic layer when the growth of the semiconductor layer is finished. The type of the termination layer includes the component and the crystal structure. Therefore the SBD devices in this invention can be employed widely with different requirements.
[0049]
There are some embodiments to help illustrate detailed descriptions of this invention. The embodiments described below are only a part of all the embodiments. Based on these embodiments, all other embodiments obtained by technicians in this field without creative work are in the scope of protection of this invention.
[0050]
Embodiment 1
[0051]
In this embodiment, a Schottky-type heterojunction structure was prepared by the following steps:
[0052]
(1) Provide a GaAs (001) substrate. During the oxide desorption, the substrate surface temperature is kept at 600 ℃ for 15 min.
[0053]
(2) The undoped GaAs semiconductor layer is epitaxially grown on the GaAs substrate at 580℃ with a background pressure of 1×10 -7~1×10 -8 torr using MBE. The thickness is and the growth rate is
[0054]
(3) Lower the substrate temperature to 455℃ at a rate of 30℃/min. The ErAs semimetal layer is epitaxially grown on the undoped GaAs semiconductor layer with a background pressure of 1×10 -7~1×10 -8 torr using MBE. The thickness is and the growth rate is
[0055]
(4) Lower the substrate temperature to 50℃ at a rate of 30℃/min. The Al protection layer is epitaxially grown on the ErAs semimetal layer with a background pressure <5×10 -10 torr using MBE. The thickness is and the growth rate is
[0056]
FIG. 4 illustrates the XRD pattern of an example of the prepared Schottky-type heterojunction structure. The ErAs layer and the GaAs layer form a Schottky contact. An Al protection layer is also epitaxially grown on the ErAs layer to avoid oxidation of the ErAs layer. According to this XRD pattern, both the ErAs layer and the Al layer show good single crystalline qualities.
[0057]
FIG. 5 illustrates a high-resolution transmission electron microscopic (TEM) image of the interface between ErAs and GaAs of the example in FIG 4. The ErAs can form a sharp and coherent interface with GaAs.
[0058]
FIG 6 is a high-resolution TEM image showing the layered structure of the prepared Al/ErAs/GaAs layers. The ErAs can form sharp interfaces with both GaAs and Al, and the ErAs/GaAs interface is coherent.
[0059]
Embodiment 2
[0060]
In the embodiment, a Schottky barrier diode device was prepared by the following steps:
[0061]
(1) Provide a GaAs (001) substrate after oxide desorption with the substrate surface temperature at 600℃ for 15 min. The heavily-doped GaAs buffer layer and the GaAs gradient layer are successively grown on the GaAs substrate at 580℃ with a background pressure of 1×10 -7~1×10 -8 torr using MBE. The thickness of the heavily-doped GaAs buffer layer is and the thickness of the gradient layer is The growth rate is Both the heavily-doped buffer layer and the gradient layer use Si as the dopant element. The doping concentration in the heavily-doped buffer layer is 1×10 18 cm -3, and the doping concentration in the gradient layer is 5×10 17 cm -3.
[0062]
(2) The doped GaAs semiconductor layer is epitaxially grown on the GaAs gradient layer at 580℃ with a background pressure of 1×10 -7~1×10 -8 torr using MBE. The thickness is The dopant element is Si and the doping concentration is 1×10 17 cm -3. The growth rate is
[0063]
(3) Lower the substrate temperature to 455℃ at a rate of 30℃/min. The ErAs semimetal layer is epitaxially grown on the above doped GaAs semiconductor layer with a background pressure of 1×10 -7~1×10 -8 torr using MBE. The thickness is and the growth rate is
[0064]
(4) Lower the substrate temperature to 200℃ at a ramp rate of 30℃/min. The substrate is transferred to a preparation chamber, heated to 300℃, and exposed to atomic hydrogen flux with a background pressure of 1×10 -5 torr for 5 min.
[0065]
(5) Lower the substrate temperature to 50℃ at a rate of 30℃/min. The Al protection layer is epitaxially grown on the above ErAs semimetal layer with the background pressure <5×10 -10 torr using MBE. The thickness is and the growth rate is
[0066]
(6) Using standard lithography technology to determine the contact positions. The etching depth reaches the heavily-doped GaAs buffer layer. The top contact is made on the Al protection layer and the bottom contacts are made on the exposed heavily-doped GaAs buffer layer with Au, to form mesa structures. The bottom contacts form Ohmic contacts with the heavily-doped GaAs buffer layer.
[0067]
In the above embodiment, the obtained SBD uses the rare earth compound (ErAs) as the semimetal layer. The rare earth compound has a rocksalt crystal structure, and similar lattice constant, compatible symmetry and better wettability with the IIIA-VA semiconductor (GaAs) , which is favorable to from a high quality single-crystalline film with sharp and coherent interfaces. In addition, MBE technique enables the in-situ epitaxial growth of the semimetal layer on the semiconductor layer under ultra high vacuum. This can reduce defects such as oxides, dangling bonds and segregation phases at the interface and further improve the interface quality. Therefore, the SBD device in this embodiment can achieve an ideal factor about 1.05 and the noise equivalent power ≤1 pW/Hz 1/2, meaning a more sensitive detection capability.
[0068]
The above embodiments are only preferable embodiments in this invention. Any improvements based on this invention made by people in this field without changing the principles are also considered to be in the protection of this invention.

Claims

[Claim 1]
A Schottky-type heterojunction structure, comprising: a semiconductor layer and a semimetal layer disposed on the semiconductor layer, wherein the semiconductor layer and the semimetal layer contact each other through Schottky contacts, wherein the semimetal layer includes semimetallic materials whose conduction band and valence band are overlapped or close to overlapped.
[Claim 2]
The Schottky-type heterojunction structure defined in claim 1, further comprising a protection layer disposed on the semimetal layer.
[Claim 3]
The Schottky-type heterojunction structure defined in claim 2, wherein the semimetal layer is a continuous film or a discontinued film.
[Claim 4]
The Schottky-type heterojunction structure defined in claim 2, wherein the thickness of the semimetal layer is less than
[Claim 5]
The Schottky-type heterojunction structure defined in any of claim 1~4, wherein the semimetallic materials are rare earth compounds composed of rare earth elements and group-VA elements.
[Claim 6]
The Schottky-type heterojunction structure defined in claim 5, wherein the rare earth elements include Er, La, Ce, Pr, Nd, Sm, Eu, Gd, Tb, Dy, Ho, Tm, Yb, Lu, Y and Sc.
[Claim 7]
The Schottky-type heterojunction structure defined in claim 5, wherein the group-VA elements include P, As, Sb and Bi.
[Claim 8]
The Schottky-type heterojunction structure defined in claim 5, wherein the rare earth compounds include ErAs, ErSb, GdAs, GdSb, SmAs, SmSb, HoAs, HoSb, EuAs, EuSb, YbAs, YbSb, LuAs, LuSb, ScAs and ScSb.
[Claim 9]
The Schottky-type heterojunction structure defined in any of claim 1~4, wherein the semiconductor layer is an intentionally doped semiconductor layer or an unintentionally doped semiconductor layer.
[Claim 10]
The Schottky-type heterojunction structure defined in claim 9, wherein the unintentionally doped semiconductor layer includes compounds composed of group-IIIA elements and group-VA elements, wherein the group-IIIA elements include Al, Ga and In and the group-VA elements include P, As, Sb and Bi.
[Claim 11]
The Schottky-type heterojunction structure defined in claim 9, wherein the intentionally doped semiconductor layer includes compounds composed of group-IIIA elements and group-VA elements, wherein the group-IIIA elements include Al, Ga and In, the group-VA elements include P, As, Sb and Bi, and the dopant elements include Si, Te, Be and C.
[Claim 12]
The Schottky-type heterojunction defined in claim 2, wherein the material of the protection layer includes Al, Mo, W, Ta, Au, Cu and Pt.
[Claim 13]
The Schottky-type heterojunction defined in claim 12, wherein the material of the protection layer is in single crystalline or poly-crystalline form.
[Claim 14]
A method for preparing the Schottky-type heterojunction structure defined in any of claim 1~13, wherein the Schottky-type heterojunction structure is grown on a substrate using thin film growth techniques.
[Claim 15]
The method defined in claim 14, wherein the thin film growth techniques include molecular beam epitaxy, metal-organic chemical vapor deposition, and pulsed laser deposition.
[Claim 16]
The method defined in claim 14, further comprising an interface treatment by hydrogen sources.
[Claim 17]
The method defined in claim 16, wherein the interface treatment includes thermal annealing and hydrogen passivation.
[Claim 18]
The method defined in claim 16, wherein the hydrogen sources are atomic hydrogen sources or hydrogen plasmas.
[Claim 19]
A Schottky barrier diode device, comprising: at least one bottom contact, a substrate, a heavily-doped buffer layer, a semiconductor layer, a semimetal layer, a protection layer, a top contact layer stacked in order, wherein the bottom contacts and the heavily-doped buffer layer contact each other through Ohmic contacts, the protection layer and the semimetal layer contact each other through Ohmic contacts, and the Schottky-type heterojunction structure defined in any of claim 1~13 is formed between the semimetal layer and the semiconductor layer.

Drawings

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