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1. WO2020192018 - ARRAY SUBSTRATE AND FABRICATING METHOD THEREOF, DISPLAY PANEL, AND DISPLAY APPARATUS

Publication Number WO/2020/192018
Publication Date 01.10.2020
International Application No. PCT/CN2019/104385
International Filing Date 04.09.2019
IPC
H01L 27/32 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
27Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
28including components using organic materials as the active part, or using a combination of organic materials with other materials as the active part
32with components specially adapted for light emission, e.g. flat-panel displays using organic light-emitting diodes
H01L 21/77 2017.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
70Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in or on a common substrate or of specific parts thereof; Manufacture of integrated circuit devices or of specific parts thereof
77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
Applicants
  • BOE TECHNOLOGY GROUP CO., LTD. [CN]/[CN]
  • HEFEI BOE JOINT TECHNOLOGY CO., LTD. [CN]/[CN]
Inventors
  • YUAN, Can
  • LI, Yongqian
  • YUAN, Zhidong
Agents
  • TEE & HOWE INTELLECTUAL PROPERTY ATTORNEYS
Priority Data
201910244376.X28.03.2019CN
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) ARRAY SUBSTRATE AND FABRICATING METHOD THEREOF, DISPLAY PANEL, AND DISPLAY APPARATUS
(FR) SUBSTRAT MATRICIEL ET SON PROCÉDÉ DE FABRICATION, PANNEAU D'AFFICHAGE ET APPAREIL D'AFFICHAGE
Abstract
(EN)
An array substrate includes a base substrate (1); a driving transistor (2) on the base substrate (1); an insulating layer (3) on the driving transistor (2), the insulating layer (3) comprising a via hole above a first electrode (21) of the driving transistor (2); a conductive portion (4) on the insulating layer (3); and a light emitting device (6) on the conductive portion (4) and electrically connected to the conductive portion (4). The conductive portion (4) may be electrically connected to the first electrode (21) of the driving transistor (2) through the via hole. The light emitting device (6) may be above the via hole, and an orthographic projection of the light emitting device (6) on the base substrate (1) may cover an orthographic projection of the via hole on the base substrate (1).
(FR)
L'invention concerne un substrat matriciel qui comprend un substrat de base (1); un transistor d'attaque (2) sur le substrat de base (1); une couche isolante (3) sur le transistor d'attaque (2), la couche isolante (3) comprenant un trou d'interconnexion au-dessus d'une première électrode (21) du transistor d'attaque (2); une partie conductrice (4) sur la couche isolante (3); et un dispositif électroluminescent (6) sur la partie conductrice (4) et électriquement connecté à la partie conductrice (4). La partie conductrice (4) peut être électriquement connectée à la première électrode (21) du transistor d'attaque (2) par l'intermédiaire du trou d'interconnexion. Le dispositif électroluminescent (6) peut être au-dessus du trou d'interconnexion, et une projection orthographique du dispositif électroluminescent (6) sur le substrat de base (1) peut recouvrir une projection orthographique du trou d'interconnexion sur le substrat de base (1).
Also published as
Latest bibliographic data on file with the International Bureau