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1. WO2020191892 - GAN-HEMT DEVICE HAVING SANDWICH STRUCTURE, AND METHOD FOR FABRICATION THEREOF

Publication Number WO/2020/191892
Publication Date 01.10.2020
International Application No. PCT/CN2019/086966
International Filing Date 15.05.2019
IPC
H01L 29/778 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
66Types of semiconductor device
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified, or switched
76Unipolar devices
772Field-effect transistors
778with two-dimensional charge carrier gas channel, e.g. HEMT
H01L 29/40 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having at least one potential-jump barrier or surface barrier; Capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof
40Electrodes
CPC
H01L 29/402
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
402Field plates
H01L 29/42316
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
40Electrodes ; ; Multistep manufacturing processes therefor
41characterised by their shape, relative sizes or dispositions
423not carrying the current to be rectified, amplified or switched
42312Gate electrodes for field effect devices
42316for field-effect transistors
H01L 29/66462
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
66007Multistep manufacturing processes
66075of devices having semiconductor bodies comprising group 14 or group 13/15 materials
66227the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
66409Unipolar field-effect transistors
66446with an active layer made of a group 13/15 material, e.g. group 13/15 velocity modulation transistor [VMT], group 13/15 negative resistance FET [NERFET]
66462with a heterojunction interface channel or gate, e.g. HFET, HIGFET, SISFET, HJFET, HEMT
H01L 29/778
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
29Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; ; Multistep manufacturing processes therefor
66Types of semiconductor device ; ; Multistep manufacturing processes therefor
68controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
76Unipolar devices ; , e.g. field effect transistors
772Field effect transistors
778with two-dimensional charge carrier gas channel, e.g. HEMT ; ; with two-dimensional charge-carrier layer formed at a heterojunction interface
Applicants
  • 华南理工大学 SOUTH CHINA UNIVERSITY OF TECHNOLOGY [CN]/[CN]
Inventors
  • 李国强 LI, Guoqiang
  • 陈丁波 CHEN, Dingbo
  • 刘智崑 LIU, Zhikun
  • 万利军 WAN, Lijun
Agents
  • 广州粤高专利商标代理有限公司 YOGO PATENT & TRADEMARK AGENCY LIMITED COMPANY
Priority Data
201910223719.422.03.2019CN
Publication Language Chinese (ZH)
Filing Language Chinese (ZH)
Designated States
Title
(EN) GAN-HEMT DEVICE HAVING SANDWICH STRUCTURE, AND METHOD FOR FABRICATION THEREOF
(FR) DISPOSITIF HEMT À BASE DE GAN AYANT UNE STRUCTURE EN SANDWICH ET SON PROCÉDÉ DE FABRICATION
(ZH) 具有三明治结构的GaN-HEMT器件及其制备方法
Abstract
(EN)
Provided are a GaN-HEMT device having a sandwich structure, and a method for fabrication thereof. The GaN-HEMT device comprises an epitaxial layer and an electrode; said epitaxial layer comprises a GaN channel layer (2) and an AlyGa1-yN barrier layer (1), arranged from top to bottom; the electrode comprises a gate electrode (6), a source electrode (7), a drain electrode (5), and a field plate electrode (10); the field plate electrode (10) and the gate electrode (6) are fabricated on the upper and lower surfaces of the epitaxial layer, respectively; the region of the field plate electrode (10) extending beyond the epitaxial layer is connected to the gate electrode (6) to form a sandwich structure; the source electrode (7) and the drain electrode (5) are respectively located at the two ends of the epitaxial layer. While ensuring the integrity of the channel of electrical conduction, the conductive channel of the device is controlled by the field effect of the lower gate and the upper field plate. The GaN-HEMT device having a sandwich structure improves the breakdown voltage and gate voltage swing of the device, improving the linearity and withstand voltage performance of the device.
(FR)
L'invention concerne un dispositif HEMT à base de GaN ayant une structure en sandwich, et son procédé de fabrication. Le dispositif HEMT à base de GaN comprend une couche épitaxiale et une électrode ; ladite couche épitaxiale comprend une couche de canal (2) de GaN et une couche barrière (1) de AlyGa1-yN, agencées de haut en bas ; l'électrode comprend une électrode de grille (6), une électrode de source (7), une électrode de drain (5), et une électrode de plaque de champ (10) ; l'électrode de plaque de champ (10) et l'électrode de grille (6) sont fabriquées sur les surfaces supérieure et inférieure de la couche épitaxiale, respectivement ; la région de l'électrode de plaque de champ (10) s'étendant au-delà de la couche épitaxiale est connectée à l'électrode de grille (6) pour former une structure en sandwich ; l'électrode de source (7) et l'électrode de drain (5) sont respectivement situées au niveau des deux extrémités de la couche épitaxiale. Tout en assurant l'intégrité du canal de conduction électrique, le canal conducteur du dispositif est commandé par l'effet de champ de la grille inférieure et de la plaque de champ supérieure. Le dispositif HEMT à base de GaN ayant une structure en sandwich améliore la tension de claquage et le balancement de tension de grille du dispositif, améliorer la linéarité et la performance de tenue en tension du dispositif.
(ZH)
一种具有三明治结构的GaN-HEMT器件及其制备方法。所述GaN-HEMT器件包括外延层和电极,所述外延层包括GaN沟道层(2)和Al yGa 1-yN势垒层(1),并自上而下排布;所述电极包括栅电极(6)、源电极(7)、漏电极(5)和场板电极(10),场板电极(10)和栅电极(6)分别制作于外延层的上表面和下表面,场板电极(10)延伸超过外延层的区域与栅电极(6)相连接形成三明治结构,源电极(7)和漏电极(5)分别位于所述外延层的两端。在保证导电沟道完整性的同时,使器件的导电沟道受到下栅极和上场板的场效应控制。具有三明治结构的GaN-HEMT器件提高了器件的击穿电压和栅压摆幅,提高了器件的线性度和耐压性能。
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