Processing

Please wait...

Settings

Settings

Goto Application

1. WO2020141370 - DUAL TRANSPORT ORIENTATION FOR STACKED VERTICAL TRANSPORT FIELD-EFFECT TRANSISTORS

Publication Number WO/2020/141370
Publication Date 09.07.2020
International Application No. PCT/IB2019/060351
International Filing Date 02.12.2019
IPC
H01L 21/02 2006.01
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus specially adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
CPC
H01L 21/02129
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
02126the material containing Si, O, and at least one of H, N, C, F, or other non-metal elements, e.g. SiOC, SiOC:H or SiONC
02129the material being boron or phosphorus doped silicon oxides, e.g. BPSG, BSG or PSG
H01L 21/0217
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
02104Forming layers
02107Forming insulating materials on a substrate
02109characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
02112characterised by the material of the layer
02123the material containing silicon
0217the material being a silicon nitride not containing oxygen, e.g. SixNy or SixByNz
H01L 21/2256
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
22Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; ; Interactions between two or more impurities; Redistribution of impurities
225using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
2251Diffusion into or out of group IV semiconductors
2254from or through or into an applied layer, e.g. photoresist, nitrides
2255the applied layer comprising oxides only, e.g. P2O5, PSG, H3BO3, doped oxides
2256through the applied layer
H01L 21/26513
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
26Bombardment with radiation
263with high-energy radiation
265producing ion implantation
26506in group IV semiconductors
26513of electrically active species
H01L 21/3065
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
302to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
306Chemical or electrical treatment, e.g. electrolytic etching
3065Plasma etching; Reactive-ion etching
H01L 21/3081
HELECTRICITY
01BASIC ELECTRIC ELEMENTS
LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
21Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
02Manufacture or treatment of semiconductor devices or of parts thereof
04the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
18the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
302to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
306Chemical or electrical treatment, e.g. electrolytic etching
308using masks
3081characterised by their composition, e.g. multilayer masks, materials
Applicants
  • INTERNATIONAL BUSINESS MACHINES CORPORATION [US]/[US]
  • IBM UNITED KINGDOM LIMITED [GB]/[GB] (MG)
  • IBM (CHINA) INVESTMENT COMPANY LIMITED [CN]/[CN] (MG)
Inventors
  • YAMASHITA, Tenko
  • ZHANG, Chen
  • CHENG, Kangguo
  • WU, Heng
Agents
  • WILLIAMS, Julian
Priority Data
16/237,93502.01.2019US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) DUAL TRANSPORT ORIENTATION FOR STACKED VERTICAL TRANSPORT FIELD-EFFECT TRANSISTORS
(FR) ORIENTATION DE TRANSPORT DOUBLE POUR TRANSISTORS À EFFET DE CHAMP À TRANSPORT VERTICAL EMPILÉS
Abstract
(EN)
A semiconductor structure includes a substrate, a vertical fin disposed over a top surface of the substrate, a first vertical transport field-effect transistor (VTFET) disposed over the top surface of the substrate surrounding a first portion of the vertical fin, an isolation layer disposed over the first VTFET surrounding a second portion of the vertical fin, and a second VTFET disposed over a top surface of the isolation layer surrounding a third portion of the vertical fin. The first portion of the vertical fin includes a first semiconductor layer with a first crystalline orientation providing a first vertical transport channel for the first VTFET, the second portion of the vertical fin includes an insulator, and the third portion of the vertical fin includes a second semiconductor layer with a second crystalline orientation providing a second vertical transport channel for the second VTFET.
(FR)
L'invention concerne une structure semi-conductrice comprenant un substrat, une ailette verticale disposée sur une surface supérieure du substrat, un premier transistor à effet de champ de transport vertical (VTFET) disposé sur la surface supérieure du substrat entourant une première partie de l'ailette verticale, une couche d'isolation disposée sur le premier VTFET entourant une deuxième partie de l'ailette verticale, et un second VTFET disposé sur une surface supérieure de la couche d'isolation entourant une troisième partie de l'ailette verticale. La première partie de l'ailette verticale comprend une première couche semi-conductrice ayant une première orientation cristalline fournissant un premier canal de transport vertical pour le premier VTFET, la deuxieme partie de l'ailette verticale comprenant un isolant, et la troisième partie de l'ailette verticale comprend une seconde couche semi-conductrice ayant une seconde orientation cristalline fournissant un second canal de transport vertical pour le second VTFET.
Also published as
Latest bibliographic data on file with the International Bureau