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1. WO2020140694 - PIXEL-DRIVING CIRCUIT AND METHOD, AND A DISPLAY UTILIZING THE SAME

Publication Number WO/2020/140694
Publication Date 09.07.2020
International Application No. PCT/CN2019/123932
International Filing Date 09.12.2019
IPC
G09G 3/3208 2016.1
GPHYSICS
09EDUCATING; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
3Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
20for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix
22using controlled light sources
30using electroluminescent panels
32semiconductive, e.g. using light-emitting diodes
3208organic, e.g. using organic light-emitting diodes
CPC
G09G 2300/0819
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2300Aspects of the constitution of display devices
08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
0809Several active elements per pixel in active matrix panels
0819used for counteracting undesired variations, e.g. feedback or autozeroing
G09G 2300/0852
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2300Aspects of the constitution of display devices
08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
0809Several active elements per pixel in active matrix panels
0842forming a memory circuit, e.g. a dynamic memory with one capacitor
0852being a dynamic memory with more than one capacitor
G09G 2300/0861
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2300Aspects of the constitution of display devices
08Active matrix structure, i.e. with use of active elements, inclusive of non-linear two terminal elements, in the pixels together with light emitting or modulating elements
0809Several active elements per pixel in active matrix panels
0842forming a memory circuit, e.g. a dynamic memory with one capacitor
0861with additional control of the display period without amending the charge stored in a pixel memory, e.g. by means of additional select electrodes
G09G 2310/061
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2310Command of the display device
06Details of flat display driving waveforms
061for resetting or blanking
G09G 2320/0233
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2320Control of display operating conditions
02Improving the quality of display appearance
0233Improving the luminance or brightness uniformity across the screen
G09G 2320/0257
GPHYSICS
09EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
GARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
2320Control of display operating conditions
02Improving the quality of display appearance
0257Reduction of after-image effects
Applicants
  • BOE TECHNOLOGY GROUP CO., LTD. [CN]/[CN]
Inventors
  • TENG, Wanpeng
  • GAO, Xueling
Agents
  • TEE & HOWE INTELLECTUAL PROPERTY ATTORNEYS
Priority Data
201910009444.404.01.2019CN
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) PIXEL-DRIVING CIRCUIT AND METHOD, AND A DISPLAY UTILIZING THE SAME
(FR) CIRCUIT ET PROCÉDÉ D'ATTAQUE DE PIXEL, ET AFFICHAGE UTILISANT CEUX-CI
Abstract
(EN)
A pixel-driving circuit includes: a write-compensation sub-circuit coupled to a signal scanning terminal, a data terminal and a driving sub-circuit, and configured to, controlled with voltage from the signal scanning terminal, provide voltages of the data terminal to the driving sub-circuit for compensation; the light-emission control sub-circuit is coupled with the light-emission terminal, the first power source terminal and the driving sub-circuit and configured to provide voltages of the first power source terminal to the first terminal of the driving transistor controlled with voltage from the light-emission control terminal; the reset sub-circuit is coupled with the reset signal terminal, the initial voltage terminal, and the driving sub-circuit and to provide voltages of the initial voltage terminal to the gate of the driving transistor controlled with voltage from the reset signal terminal, causing the driving transistor to be in ON and OFF states respectively during the first and second initialization phases.
(FR)
L'invention concerne un circuit d'attaque de pixel comprenant : un sous-circuit de compensation d'écriture couplé à une borne de balayage de signal, à une borne de données et à un sous-circuit d'attaque, et configuré pour fournir, sous la commande d'une tension provenant de la borne de balayage de signal, des tensions de la borne de données au sous-circuit d'attaque à des fins de compensation ; un sous-circuit de commande d'émission lumineuse, couplé à la borne d'émission lumineuse, à la première borne de source d'alimentation et au sous-circuit d'attaque et configuré pour fournir les tensions de la première borne de source d'alimentation à la première borne du transistor d'attaque commandé par la tension provenant de la borne de commande d'émission lumineuse ; un sous-circuit de réinitialisation, couplé à la borne de signal de réinitialisation, à la borne de tension initiale et au sous-circuit d'attaque et destiné à fournir les tensions de la borne de tension initiale à la grille du transistor d'attaque commandé par la tension provenant de la borne de signal de réinitialisation, pour amener le transistor d'attaque dans des états MARCHE et ARRÊT, respectivement, pendant une première et une seconde phase d'initialisation.
Also published as
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