Processing

Please wait...

PATENTSCOPE will be unavailable a few hours for maintenance reason on Tuesday 27.07.2021 at 12:00 PM CEST
Settings

Settings

Goto Application

1. WO2020139539 - UNAUTHORIZED MEMORY ACCESS MITIGATION

Publication Number WO/2020/139539
Publication Date 02.07.2020
International Application No. PCT/US2019/064903
International Filing Date 06.12.2019
IPC
G06F 21/62 2013.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
62Protecting access to data via a platform, e.g. using keys or access control rules
G06F 21/60 2013.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
60Protecting data
G06F 21/30 2013.1
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
21Security arrangements for protecting computers, components thereof, programs or data against unauthorised activity
30Authentication, i.e. establishing the identity or authorisation of security principals
H04L 9/32 2006.1
HELECTRICITY
04ELECTRIC COMMUNICATION TECHNIQUE
LTRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
9Arrangements for secret or secure communication
32including means for verifying the identity or authority of a user of the system
CPC
G06F 3/0622
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers ; , e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0602specifically adapted to achieve a particular effect
062Securing storage systems
0622in relation to access
G06F 3/0637
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers ; , e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0628making use of a particular technique
0629Configuration or reconfiguration of storage systems
0637Permissions
G06F 3/0638
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers ; , e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0628making use of a particular technique
0638Organizing or formatting or addressing of data
G06F 3/0655
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers ; , e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0628making use of a particular technique
0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
G06F 3/0673
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers ; , e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0668adopting a particular infrastructure
0671In-line storage system
0673Single storage device
G06F 3/0688
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
3Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
06Digital input from or digital output to record carriers ; , e.g. RAID, emulated record carriers, networked record carriers
0601Dedicated interfaces to storage systems
0668adopting a particular infrastructure
0671In-line storage system
0683Plurality of storage devices
0688Non-volatile semiconductor memory arrays
Applicants
  • MICRON TECHNOLOGY, INC. [US]/[US]
Inventors
  • MURPHY, Richard C.
  • SWAMI, Shivam
  • MALIHI, Naveh
  • KORZH, Anton
  • HUSH, Glen E.
Agents
  • DENKER, James E.
Priority Data
16/235,30328.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) UNAUTHORIZED MEMORY ACCESS MITIGATION
(FR) LIMITATION D'ACCÈS NON AUTORISÉS À LA MÉMOIRE
Abstract
(EN)
Apparatuses and methods related to mitigating unauthorized memory access are described. Mitigating unauthorized memory access can include verifying whether an access command is authorized to access a protected region of a memory array. The authorization can be verified utilizing a key and a memory address corresponding to the access command. If an access command is authorized to access a protected region, then a row of the memory array corresponding to the access command can be activated. If an access command is not authorized to access the protected region, then a row of the memory array corresponding to the access command may not be activated.
(FR)
L'invention concerne des appareils et des procédés se rapportant à la limitation d'accès non autorisés à la mémoire. La limitation d'accès non autorisés à la mémoire peut consister à vérifier si une commande d'accès est autorisée à accéder à une région protégée d'une matrice mémoire. L'autorisation peut être vérifiée en utilisant une clé et une adresse mémoire correspondant à la commande d'accès. Si une commande d'accès est autorisée à accéder à une région protégée, alors une ligne de la matrice mémoire correspondant à la commande d'accès peut être activée. Si une commande d'accès n'est pas autorisée à accéder à la région protégée, alors une ligne de la matrice mémoire correspondant à la commande d'accès peut ne pas être activée.
Also published as
Latest bibliographic data on file with the International Bureau