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1. WO2020139496 - AGING TOLERANT SYSTEM DESIGN USING SILICON RESOURCE UTILIZATION

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Publication Number WO/2020/139496
Publication Date 02.07.2020
International Application No. PCT/US2019/062790
International Filing Date 22.11.2019
IPC
G06F 13/40 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
38Information transfer, e.g. on bus
40Bus structure
G06F 13/16 2006.01
GPHYSICS
06COMPUTING; CALCULATING OR COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
16for access to memory bus
CPC
G06F 13/1668
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
14Handling requests for interconnection or transfer
16for access to memory bus
1668Details of memory controller
G06F 13/4022
GPHYSICS
06COMPUTING; CALCULATING; COUNTING
FELECTRIC DIGITAL DATA PROCESSING
13Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
38Information transfer, e.g. on bus
40Bus structure
4004Coupling between buses
4022using switching circuits, e.g. switching matrix, connection or expansion network
Applicants
  • INTEL CORPORATION [US]/[US]
Inventors
  • SRIVASTAVA, Amit Kumar
  • AZAM, Asad
Agents
  • PERDOK, Monique M.
  • ARORA, Suneel / U.S. Reg. No. 42,267
  • BEEKMAN, Marvin / U.S. Reg. No. 38,377
  • BLACK, David W. / U.S. Reg. No. 42,331
  • LANG, Roger / U.S. Reg. No. 58,829
  • SCHEER, Bradley W. / U.S. Reg. No. 47,059
Priority Data
16/236,47129.12.2018US
Publication Language English (EN)
Filing Language English (EN)
Designated States
Title
(EN) AGING TOLERANT SYSTEM DESIGN USING SILICON RESOURCE UTILIZATION
(FR) CONCEPTION DE SYSTÈME INSENSIBLE AU VIEILLISSEMENT AVEC UTILISATION DE RESSOURCES DE SILICIUM
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Abstract
(EN)
An integrated circuit for monitoring components of the integrated circuit, comprising: a resource monitoring circuit configured to: track activity factors for a plurality of components of the integrated circuit; evaluate the activity factors for each of the plurality of components; determine whether an activity factor for a particular component of the plurality of components exceeds a threshold; and transmit, from the resource monitoring circuit, a signal to a software element, causing the software element to deactivate the particular component and activate an alternate component, when the activity factor for the particular component exceeds the threshold and the alternate component is available to substitute for the particular component.
(FR)
La présente invention concerne un circuit intégré pour surveiller des composants du circuit intégré comprenant : un circuit de surveillance de ressources configuré pour : suivre des facteurs d'activité pour une pluralité de composants du circuit intégré ; évaluer les facteurs d'activité pour chaque composant de la pluralité de composants ; déterminer si un facteur d'activité pour un composant particulier de la pluralité de composants dépasse un seuil ; et transmettre, à partir du circuit de surveillance de ressources, un signal à un élément logiciel, amenant l'élément logiciel à désactiver le composant particulier et à activer un autre composant, lorsque le facteur d'activité pour le composant particulier dépasse le seuil et que l'autre composant est disponible pour remplacer le composant particulier.
Also published as
US20190138479
Latest bibliographic data on file with the International Bureau
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